[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 12/24] hw/arm/smmu-common: IOMMU memory region and ad
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 12/24] hw/arm/smmu-common: IOMMU memory region and address space setup |
Date: |
Fri, 4 May 2018 18:15:28 +0100 |
From: Eric Auger <address@hidden>
We set up the infrastructure to enumerate all the PCI devices
attached to the SMMU and create an associated IOMMU memory
region and address space.
Those info are stored in SMMUDevice objects. The devices are
grouped according to the PCIBus they belong to. A hash table
indexed by the PCIBus pointer is used. Also an array indexed by
the bus number allows to find the list of SMMUDevices.
Signed-off-by: Eric Auger <address@hidden>
Signed-off-by: Prem Mallappa <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
include/hw/arm/smmu-common.h | 8 +++++
hw/arm/smmu-common.c | 69 ++++++++++++++++++++++++++++++++++++
hw/arm/trace-events | 3 ++
3 files changed, 80 insertions(+)
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
index d682be82d2..8b947774b0 100644
--- a/include/hw/arm/smmu-common.h
+++ b/include/hw/arm/smmu-common.h
@@ -120,4 +120,12 @@ typedef struct {
#define ARM_SMMU_GET_CLASS(obj) \
OBJECT_GET_CLASS(SMMUBaseClass, (obj), TYPE_ARM_SMMU)
+/* Return the SMMUPciBus handle associated to a PCI bus number */
+SMMUPciBus *smmu_find_smmu_pcibus(SMMUState *s, uint8_t bus_num);
+
+/* Return the stream ID of an SMMU device */
+static inline uint16_t smmu_get_sid(SMMUDevice *sdev)
+{
+ return PCI_BUILD_BDF(pci_bus_num(sdev->bus), sdev->devfn);
+}
#endif /* HW_ARM_SMMU_COMMON */
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
index e086ff52a5..3d64bcfac2 100644
--- a/hw/arm/smmu-common.c
+++ b/hw/arm/smmu-common.c
@@ -28,8 +28,69 @@
#include "qemu/error-report.h"
#include "hw/arm/smmu-common.h"
+/**
+ * The bus number is used for lookup when SID based invalidation occurs.
+ * In that case we lazily populate the SMMUPciBus array from the bus hash
+ * table. At the time the SMMUPciBus is created (smmu_find_add_as), the bus
+ * numbers may not be always initialized yet.
+ */
+SMMUPciBus *smmu_find_smmu_pcibus(SMMUState *s, uint8_t bus_num)
+{
+ SMMUPciBus *smmu_pci_bus = s->smmu_pcibus_by_bus_num[bus_num];
+
+ if (!smmu_pci_bus) {
+ GHashTableIter iter;
+
+ g_hash_table_iter_init(&iter, s->smmu_pcibus_by_busptr);
+ while (g_hash_table_iter_next(&iter, NULL, (void **)&smmu_pci_bus)) {
+ if (pci_bus_num(smmu_pci_bus->bus) == bus_num) {
+ s->smmu_pcibus_by_bus_num[bus_num] = smmu_pci_bus;
+ return smmu_pci_bus;
+ }
+ }
+ }
+ return smmu_pci_bus;
+}
+
+static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn)
+{
+ SMMUState *s = opaque;
+ SMMUPciBus *sbus = g_hash_table_lookup(s->smmu_pcibus_by_busptr, bus);
+ SMMUDevice *sdev;
+
+ if (!sbus) {
+ sbus = g_malloc0(sizeof(SMMUPciBus) +
+ sizeof(SMMUDevice *) * SMMU_PCI_DEVFN_MAX);
+ sbus->bus = bus;
+ g_hash_table_insert(s->smmu_pcibus_by_busptr, bus, sbus);
+ }
+
+ sdev = sbus->pbdev[devfn];
+ if (!sdev) {
+ char *name = g_strdup_printf("%s-%d-%d",
+ s->mrtypename,
+ pci_bus_num(bus), devfn);
+ sdev = sbus->pbdev[devfn] = g_new0(SMMUDevice, 1);
+
+ sdev->smmu = s;
+ sdev->bus = bus;
+ sdev->devfn = devfn;
+
+ memory_region_init_iommu(&sdev->iommu, sizeof(sdev->iommu),
+ s->mrtypename,
+ OBJECT(s), name, 1ULL << SMMU_MAX_VA_BITS);
+ address_space_init(&sdev->as,
+ MEMORY_REGION(&sdev->iommu), name);
+ trace_smmu_add_mr(name);
+ g_free(name);
+ }
+
+ return &sdev->as;
+}
+
static void smmu_base_realize(DeviceState *dev, Error **errp)
{
+ SMMUState *s = ARM_SMMU(dev);
SMMUBaseClass *sbc = ARM_SMMU_GET_CLASS(dev);
Error *local_err = NULL;
@@ -38,6 +99,14 @@ static void smmu_base_realize(DeviceState *dev, Error **errp)
error_propagate(errp, local_err);
return;
}
+
+ s->smmu_pcibus_by_busptr = g_hash_table_new(NULL, NULL);
+
+ if (s->primary_bus) {
+ pci_setup_iommu(s->primary_bus, smmu_find_add_as, s);
+ } else {
+ error_setg(errp, "SMMU is not attached to any PCI bus!");
+ }
}
static void smmu_base_reset(DeviceState *dev)
diff --git a/hw/arm/trace-events b/hw/arm/trace-events
index 193063ed99..8e8b53c95d 100644
--- a/hw/arm/trace-events
+++ b/hw/arm/trace-events
@@ -2,3 +2,6 @@
# hw/arm/virt-acpi-build.c
virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out."
+
+# hw/arm/smmu-common.c
+smmu_add_mr(const char *name) "%s"
\ No newline at end of file
--
2.17.0
- [Qemu-devel] [PULL 05/24] hw/net/smc91c111: Convert away from old_mmio, (continued)
- [Qemu-devel] [PULL 05/24] hw/net/smc91c111: Convert away from old_mmio, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 07/24] target/arm: Tidy conditions in handle_vec_simd_shri, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 03/24] hw/char/cmsdk-apb-uart.c: Accept more input after character read, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 04/24] hw/usb/tusb6010: Convert away from old_mmio, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 02/24] target/arm: Correct MPUIR privilege level in register_cp_regs_for_features() conditional case, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 06/24] arm: boot: set boot_info starting from first_cpu, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 01/24] hw/arm/virt: Add linux, pci-domain property, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 08/24] target/arm: Tidy condition in disas_simd_two_reg_misc, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 09/24] hw/arm: Don't fail qtest due to missing SD card in -nodefaults mode, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 10/24] target/arm: Implement v8M VLLDM and VLSTM, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 12/24] hw/arm/smmu-common: IOMMU memory region and address space setup,
Peter Maydell <=
- [Qemu-devel] [PULL 11/24] hw/arm/smmu-common: smmu base device and datatypes, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 15/24] hw/arm/smmuv3: Wired IRQ and GERROR helpers, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 16/24] hw/arm/smmuv3: Queue helpers, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 17/24] hw/arm/smmuv3: Implement MMIO write operations, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 19/24] hw/arm/smmuv3: Implement translate callback, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 22/24] hw/arm/virt: Add SMMUv3 to the virt board, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 18/24] hw/arm/smmuv3: Event queue recording helper, Peter Maydell, 2018/05/04
- [Qemu-devel] [PULL 13/24] hw/arm/smmu-common: VMSAv8-64 page table walk, Peter Maydell, 2018/05/04