Re: [Qemu-devel] [RFC PATCH 02/12] tests/tcg/tricore: Add build infrastructure

[Philippe Mathieu-Daudé]

Hi Bastian,

On 05/01/2018 11:22 AM, Bastian Koppelmann wrote:
> this includes the Makefile and linker script to build all the tests.
> 
> Signed-off-by: Bastian Koppelmann <address@hidden>
> ---
>  tests/tcg/tricore/Makefile | 30 +++++++++++++++++++++++
>  tests/tcg/tricore/link.ld  | 60 
> ++++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 90 insertions(+)
>  create mode 100644 tests/tcg/tricore/Makefile
>  create mode 100644 tests/tcg/tricore/link.ld
> 
> diff --git a/tests/tcg/tricore/Makefile b/tests/tcg/tricore/Makefile
> new file mode 100644
> index 0000000000..8c168d1062
> --- /dev/null
> +++ b/tests/tcg/tricore/Makefile
> @@ -0,0 +1,30 @@
> +AS := tricore-as
> +LD := tricore-ld
> +HOST_CC = gcc
> +
> +LDFLAGS = -Tlink.ld
> +ASFLAGS =
> +
> +SIM = ../../../tricore-softmmu/qemu-system-tricore
> +SIMFLAGS = -M tricore_testboard -nographic -kernel

I applied this on upstream QEMU (26bd8d98c4b32).

I suppose you are doing in-tree build, since this doesn't work with
out-of-tree builds (see the $SIM relative path).

I then get:

tricore-softmmu/qemu-system-tricore -M tricore_testboard -nographic
-kests/tcg/tricore/test_muls.tst -d in_asm
QEMU 2.12.50 monitor - type 'help' for more information
(qemu) QEMU 2.12.50 monitor - type 'help' for more information
(qemu) IN:
0x80000000:  qemu-system-tricore: function cpu_get_phys_page_attrs_debug
not implemented, aborting

OBJD-T: 0000000000000000000000000000000000000000000000000000000000000000
OBJD-T: 000000000000000000000000

Having checked the testdevice is here:

tricore-softmmu/qemu-system-tricore -M tricore_testboard -S -monitor stdio
QEMU 2.12.50 monitor - type 'help' for more information
(qemu) info mtree
address-space: memory
  0000000000000000-ffffffffffffffff (prio 0, i/o): system
    0000000080000000-00000000801fffff (prio 0, ram): powerlink_ext_c.ram
    00000000a1000000-00000000a13fffff (prio 0, ram): powerlink_ext_d.ram
    00000000d0000000-00000000d000bfff (prio 0, ram): powerlink_int_d.ram
    00000000d4000000-00000000d400bfff (prio 0, ram): powerlink_int_c.ram
    00000000f0000000-00000000f0000003 (prio 0, i/o): tricore_testdevice
    00000000f0050000-00000000f0053fff (prio 0, ram): powerlink_pcp_data.ram
    00000000f0060000-00000000f0067fff (prio 0, ram): powerlink_pcp_text.ram

Using the docker image provided here:
http://lists.nongnu.org/archive/html/qemu-devel/2018-05/msg00151.html
(which you can build with 'make docker-image-debian-tricore-cross', I
didn't try to merge your series over Alex's tcg-testing one)

This test seems correctly linked:

$ docker run --rm -it -v $(pwd):$(pwd) -w $(pwd) -u $(id -u) \
    qemu:debian-tricore-cross \
      tricore-readelf -e tests/tcg/tricore/test_muls.tst
ELF Header:
  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00
  Class:                             ELF32
  Data:                              2's complement, little endian
  Version:                           1 (current)
  OS/ABI:                            UNIX - System V
  ABI Version:                       0
  Type:                              EXEC (Executable file)
  Machine:                           Siemens Tricore
  Version:                           0x1
  Entry point address:               0x80000000
  Start of program headers:          52 (bytes into file)
  Start of section headers:          32812 (bytes into file)
  Flags:                             0x2
  Size of this header:               52 (bytes)
  Size of program headers:           32 (bytes)
  Number of program headers:         2
  Size of section headers:           40 (bytes)
  Number of section headers:         7
  Section header string table index: 4

Section Headers:
  [Nr] Name              Type            Addr     Off    Size   ES Flg
Lk Inf Al
  [ 0]                   NULL            00000000 000000 000000 00
0   0  0
  [ 1] .text             PROGBITS        80000000 004000 0000a8 00  AX
0   0  2
  [ 2] .data             PROGBITS        d0000000 008000 000000 00  WA
0   0  8
  [ 3] .bss              NOBITS          d0000000 008000 000000 00  WA
0   0  8
  [ 4] .shstrtab         STRTAB          00000000 008000 00002c 00
0   0  1
  [ 5] .symtab           SYMTAB          00000000 008144 0001c0 10
6  14  4
  [ 6] .strtab           STRTAB          00000000 008304 0000b3 00
0   0  1
Key to Flags:
  W (write), A (alloc), X (execute), M (merge), S (strings)
  I (info), L (link order), G (group), x (unknown)
  O (extra OS processing required) o (OS specific), p (processor specific)

Program Headers:
  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
  LOAD           0x004000 0x80000000 0x80000000 0x000a8 0x000a8 R E 0x4000
  LOAD           0x008000 0xd0000000 0xd0000000 0x00000 0x00000 RW  0x4000

 Section to Segment mapping:
  Segment Sections...
   00     .text
   01

> +
> +all: build
> +
> +%.pS: %.S
> +     $(HOST_CC) -E -o $@ $<
> +
> +%.o: %.pS
> +     $(AS) $(ASFLAGS) -o $@ $<
> +
> +%.tst: %.o link.ld
> +     $(LD) $(LDFLAGS) $< -o $@

Those rules did not work for me:

$ make test_dvstep.tst
cc    -c -o test_dvstep.o test_dvstep.S
test_dvstep.S: Assembler messages:
test_dvstep.S:6: Error: no such instruction: `mov.u %d6,lo:0xfffffe5c'
test_dvstep.S:6: Error: no such instruction: `movh %d10,up:0xfffffe5c'

However called in the same line it did:

$ make test_muls.pS test_muls.o test_muls.tst
gcc -E -o test_muls.pS test_muls.S
tricore-as  -o test_muls.o test_muls.pS
tricore-ld -Tlink.ld test_muls.o -o test_muls.tst

Regards,

Phil.

> +
> +build: $(TESTCASES)
> +
> +check: $(addprefix run-, $(TESTCASES))
> +
> +run-%.tst: %.tst
> +     $(SIM) $(SIMFLAGS) ./$<
> +
> +clean:
> +     $(RM) -fr $(TESTCASES) linker.ld
> diff --git a/tests/tcg/tricore/link.ld b/tests/tcg/tricore/link.ld
> new file mode 100644
> index 0000000000..364bcdc00a
> --- /dev/null
> +++ b/tests/tcg/tricore/link.ld
> @@ -0,0 +1,60 @@
> +/* Default linker script, for normal executables */
> +OUTPUT_FORMAT("elf32-tricore")
> +OUTPUT_ARCH(tricore)
> +ENTRY(_start)
> +
> +/* the internal ram description */
> +MEMORY
> +{
> +  text_ram (rx!p): org = 0x80000000, len = 15K
> +  data_ram (w!xp): org = 0xd0000000, len = 130K
> +}
> +/*
> + * Define the sizes of the user and system stacks.
> + */
> +__USTACK_SIZE = DEFINED (__USTACK_SIZE) ? __USTACK_SIZE : 1K ;
> +/*
> + * Define the start address and the size of the context save area.
> + */
> +__CSA_BEGIN =  0xd0000000 ;
> +__CSA_SIZE =  8k ;
> +__CSA_END = __CSA_BEGIN + __CSA_SIZE ;
> +
> +SECTIONS
> +{
> +  .text  :
> +  {
> +    *(.text)
> +    . = ALIGN(8);
> +  } > text_ram
> +
> +  .rodata :
> +  {
> +    *(.rodata)
> +    *(.rodata1)
> +  } > data_ram
> +
> +  .data :
> +  {
> +    . = ALIGN(8) ;
> +    *(.data)
> +    *(.data.*)
> +    . = ALIGN(8) ;
> +    __USTACK = . + __USTACK_SIZE -768;
> +
> +  } > data_ram
> +  /*
> +   * Allocate space for BSS sections.
> +   */
> +  .bss  :
> +  {
> +    BSS_BASE = . ;
> +    *(.bss)
> +    *(COMMON)
> +    . = ALIGN(8) ;
> +  } > data_ram
> +  /* Make sure CSA, stack and heap addresses are properly aligned.  */
> +  _. = ASSERT ((__CSA_BEGIN & 0x3f) == 0 , "illegal CSA start address") ;
> +  _. = ASSERT ((__CSA_SIZE & 0x3f) == 0 , "illegal CSA size") ;
> +
> +}
>

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