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Re: [Qemu-devel] [PATCH v8 07/35] RISC-V: Make some header guards more s
From: |
Alistair Francis |
Subject: |
Re: [Qemu-devel] [PATCH v8 07/35] RISC-V: Make some header guards more specific |
Date: |
Thu, 26 Apr 2018 16:43:10 +0000 |
On Wed, Apr 25, 2018 at 4:57 PM Michael Clark <address@hidden> wrote:
> Cc: Sagar Karandikar <address@hidden>
> Cc: Bastian Koppelmann <address@hidden>
> Signed-off-by: Michael Clark <address@hidden>
> Signed-off-by: Palmer Dabbelt <address@hidden>
> Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Alistair
> ---
> include/hw/riscv/spike.h | 4 ++--
> include/hw/riscv/virt.h | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
> diff --git a/include/hw/riscv/spike.h b/include/hw/riscv/spike.h
> index 8410430..641b70d 100644
> --- a/include/hw/riscv/spike.h
> +++ b/include/hw/riscv/spike.h
> @@ -16,8 +16,8 @@
> * this program. If not, see <http://www.gnu.org/licenses/>.
> */
> -#ifndef HW_SPIKE_H
> -#define HW_SPIKE_H
> +#ifndef HW_RISCV_SPIKE_H
> +#define HW_RISCV_SPIKE_H
> typedef struct {
> /*< private >*/
> diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
> index b91a412..3a4f23e 100644
> --- a/include/hw/riscv/virt.h
> +++ b/include/hw/riscv/virt.h
> @@ -16,8 +16,8 @@
> * this program. If not, see <http://www.gnu.org/licenses/>.
> */
> -#ifndef HW_VIRT_H
> -#define HW_VIRT_H
> +#ifndef HW_RISCV_VIRT_H
> +#define HW_RISCV_VIRT_H
> typedef struct {
> /*< private >*/
> --
> 2.7.0
- [Qemu-devel] [PATCH v8 00/35] QEMU 2.13 Privileged ISA emulation updates, Michael Clark, 2018/04/25
- [Qemu-devel] [PATCH v8 01/35] RISC-V: Replace hardcoded constants with enum values, Michael Clark, 2018/04/25
- [Qemu-devel] [PATCH v8 02/35] RISC-V: Make virt board description match spike, Michael Clark, 2018/04/25
- [Qemu-devel] [PATCH v8 03/35] RISC-V: Use ROM base address and size from memmap, Michael Clark, 2018/04/25
- [Qemu-devel] [PATCH v8 04/35] RISC-V: Remove identity_translate from load_elf, Michael Clark, 2018/04/25
- [Qemu-devel] [PATCH v8 05/35] RISC-V: Remove unused class definitions, Michael Clark, 2018/04/25
- [Qemu-devel] [PATCH v8 06/35] RISC-V: Include instruction hex in disassembly, Michael Clark, 2018/04/25
- [Qemu-devel] [PATCH v8 07/35] RISC-V: Make some header guards more specific, Michael Clark, 2018/04/25
- Re: [Qemu-devel] [PATCH v8 07/35] RISC-V: Make some header guards more specific,
Alistair Francis <=
- [Qemu-devel] [PATCH v8 08/35] RISC-V: Make virt header comment title consistent, Michael Clark, 2018/04/25
- [Qemu-devel] [PATCH v8 09/35] RISC-V: Remove EM_RISCV ELF_MACHINE indirection, Michael Clark, 2018/04/25
- [Qemu-devel] [PATCH v8 10/35] RISC-V: Remove erroneous comment from translate.c, Michael Clark, 2018/04/25
- [Qemu-devel] [PATCH v8 12/35] RISC-V: Update address bits to support sv39 and sv48, Michael Clark, 2018/04/25
- [Qemu-devel] [PATCH v8 11/35] RISC-V: Mark ROM read-only after copying in code, Michael Clark, 2018/04/25