[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 09/19] target/arm: Support multiple EL change hooks
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 09/19] target/arm: Support multiple EL change hooks |
Date: |
Thu, 26 Apr 2018 11:47:05 +0100 |
From: Aaron Lindsay <address@hidden>
Signed-off-by: Aaron Lindsay <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/cpu.h | 20 ++++++++++----------
target/arm/internals.h | 7 ++++---
target/arm/cpu.c | 21 ++++++++++++++++-----
3 files changed, 30 insertions(+), 18 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 6bd8ff5917..b3def5afad 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -632,12 +632,17 @@ typedef struct CPUARMState {
} CPUARMState;
/**
- * ARMELChangeHook:
+ * ARMELChangeHookFn:
* type of a function which can be registered via arm_register_el_change_hook()
* to get callbacks when the CPU changes its exception level or mode.
*/
-typedef void ARMELChangeHook(ARMCPU *cpu, void *opaque);
-
+typedef void ARMELChangeHookFn(ARMCPU *cpu, void *opaque);
+typedef struct ARMELChangeHook ARMELChangeHook;
+struct ARMELChangeHook {
+ ARMELChangeHookFn *hook;
+ void *opaque;
+ QLIST_ENTRY(ARMELChangeHook) node;
+};
/* These values map onto the return values for
* QEMU_PSCI_0_2_FN_AFFINITY_INFO */
@@ -826,8 +831,7 @@ struct ARMCPU {
*/
bool cfgend;
- ARMELChangeHook *el_change_hook;
- void *el_change_hook_opaque;
+ QLIST_HEAD(, ARMELChangeHook) el_change_hooks;
int32_t node_id; /* NUMA node this CPU belongs to */
@@ -2894,12 +2898,8 @@ static inline AddressSpace *arm_addressspace(CPUState
*cs, MemTxAttrs attrs)
* CPU changes exception level or mode. The hook function will be
* passed a pointer to the ARMCPU and the opaque data pointer passed
* to this function when the hook was registered.
- *
- * Note that we currently only support registering a single hook function,
- * and will assert if this function is called twice.
- * This facility is intended for the use of the GICv3 emulation.
*/
-void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHook *hook,
+void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
void *opaque);
/**
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 8ce944b7a0..6358c2ad5a 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -727,11 +727,12 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr
physaddr,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr);
-/* Call the EL change hook if one has been registered */
+/* Call any registered EL change hooks */
static inline void arm_call_el_change_hook(ARMCPU *cpu)
{
- if (cpu->el_change_hook) {
- cpu->el_change_hook(cpu, cpu->el_change_hook_opaque);
+ ARMELChangeHook *hook, *next;
+ QLIST_FOREACH_SAFE(hook, &cpu->el_change_hooks, node, next) {
+ hook->hook(cpu, hook->opaque);
}
}
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 022d8c5787..1f689f6817 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -55,13 +55,15 @@ static bool arm_cpu_has_work(CPUState *cs)
| CPU_INTERRUPT_EXITTB);
}
-void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHook *hook,
+void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
void *opaque)
{
- /* We currently only support registering a single hook function */
- assert(!cpu->el_change_hook);
- cpu->el_change_hook = hook;
- cpu->el_change_hook_opaque = opaque;
+ ARMELChangeHook *entry = g_new0(ARMELChangeHook, 1);
+
+ entry->hook = hook;
+ entry->opaque = opaque;
+
+ QLIST_INSERT_HEAD(&cpu->el_change_hooks, entry, node);
}
static void cp_reg_reset(gpointer key, gpointer value, gpointer opaque)
@@ -552,6 +554,8 @@ static void arm_cpu_initfn(Object *obj)
cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal,
g_free, g_free);
+ QLIST_INIT(&cpu->el_change_hooks);
+
#ifndef CONFIG_USER_ONLY
/* Our inbound IRQ and FIQ lines */
if (kvm_enabled()) {
@@ -713,7 +717,14 @@ static void arm_cpu_post_init(Object *obj)
static void arm_cpu_finalizefn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
+ ARMELChangeHook *hook, *next;
+
g_hash_table_destroy(cpu->cp_regs);
+
+ QLIST_FOREACH_SAFE(hook, &cpu->el_change_hooks, node, next) {
+ QLIST_REMOVE(hook, node);
+ g_free(hook);
+ }
}
static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
--
2.17.0
- [Qemu-devel] [PULL 00/19] target-arm queue, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 07/19] target/arm: Mask PMU register writes based on PMCR_EL0.N, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 12/19] target/arm: Fix bitmask for PMCCFILTR writes, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 10/19] target/arm: Add pre-EL change hooks, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 11/19] target/arm: Allow EL change hooks to do IO, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 06/19] target/arm: Treat PMCCNTR as alias of PMCCNTR_EL0, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 14/19] hw/arm/raspi: Don't bother setting default_cpu_type, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 09/19] target/arm: Support multiple EL change hooks,
Peter Maydell <=
- [Qemu-devel] [PULL 13/19] target/arm: Make PMOVSCLR and PMUSERENR 64 bits wide, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 04/19] target/arm: Use v7m_stack_read() for reading the frame signature, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 15/19] hw/arm/highbank: don't make sysram 'nomigrate', Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 02/19] arm: always start from first_cpu when registering loader cpu reset callback, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 01/19] device_tree: Increase FDT_MAX_SIZE to 1 MiB, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 19/19] xilinx_spips: Correct SNOOP_NONE state when flushing the txfifo, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 17/19] hw/arm/aspeed_soc: don't use vmstate_register_ram_global for SRAM, Peter Maydell, 2018/04/26
- [Qemu-devel] [PULL 05/19] target/arm: Check PMCNTEN for whether PMCCNTR is enabled, Peter Maydell, 2018/04/26