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[Qemu-devel] [PATCH v4 20/21] target/arm: Mark PMINTENSET accesses as po
From: |
Aaron Lindsay |
Subject: |
[Qemu-devel] [PATCH v4 20/21] target/arm: Mark PMINTENSET accesses as possibly doing IO |
Date: |
Tue, 17 Apr 2018 16:38:04 -0400 |
This makes it match its AArch64 equivalent, PMINTENSET_EL1
Signed-off-by: Aaron Lindsay <address@hidden>
---
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 3902719..046e37c 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -1732,7 +1732,7 @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
.writefn = pmuserenr_write, .raw_writefn = raw_write },
{ .name = "PMINTENSET", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 =
1,
.access = PL1_RW, .accessfn = access_tpm,
- .type = ARM_CP_ALIAS,
+ .type = ARM_CP_ALIAS | ARM_CP_IO,
.fieldoffset = offsetoflow32(CPUARMState, cp15.c9_pminten),
.resetvalue = 0,
.writefn = pmintenset_write, .raw_writefn = raw_write },
--
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
- [Qemu-devel] [PATCH v4 12/21] target/arm: Make PMOVSCLR and PMUSERENR 64 bits wide, (continued)
- [Qemu-devel] [PATCH v4 12/21] target/arm: Make PMOVSCLR and PMUSERENR 64 bits wide, Aaron Lindsay, 2018/04/17
- [Qemu-devel] [PATCH v4 11/21] target/arm: Allow AArch32 access for PMCCFILTR, Aaron Lindsay, 2018/04/17
- [Qemu-devel] [PATCH v4 10/21] target/arm: Filter cycle counter based on PMCCFILTR_EL0, Aaron Lindsay, 2018/04/17
- [Qemu-devel] [PATCH v4 14/21] target/arm: Implement PMOVSSET, Aaron Lindsay, 2018/04/17
- [Qemu-devel] [PATCH v4 18/21] target/arm: PMU: Set PMCR.N to 4, Aaron Lindsay, 2018/04/17
- [Qemu-devel] [PATCH v4 13/21] target/arm: Add ARM_FEATURE_V7VE for v7 Virtualization Extensions, Aaron Lindsay, 2018/04/17
- [Qemu-devel] [PATCH v4 17/21] target/arm: PMU: Add instruction and cycle events, Aaron Lindsay, 2018/04/17
- [Qemu-devel] [PATCH v4 15/21] target/arm: Add array for supported PMU events, generate PMCEID[01], Aaron Lindsay, 2018/04/17
- [Qemu-devel] [PATCH v4 19/21] target/arm: Implement PMSWINC, Aaron Lindsay, 2018/04/17
- [Qemu-devel] [PATCH v4 16/21] target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER, Aaron Lindsay, 2018/04/17
- [Qemu-devel] [PATCH v4 20/21] target/arm: Mark PMINTENSET accesses as possibly doing IO,
Aaron Lindsay <=
- [Qemu-devel] [PATCH v4 21/21] target/arm: Send interrupts on PMU counter overflow, Aaron Lindsay, 2018/04/17
- Re: [Qemu-devel] [PATCH v4 00/21] More fully implement ARM PMUv3, Peter Maydell, 2018/04/20