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[Qemu-devel] [PATCH v4 1/4] target/arm: Add "ARM_CP_NO_GDB" as a new bit
From: |
Abdallah Bouassida |
Subject: |
[Qemu-devel] [PATCH v4 1/4] target/arm: Add "ARM_CP_NO_GDB" as a new bit field for ARMCPRegInfo type |
Date: |
Mon, 12 Mar 2018 11:31:27 +0100 |
This is a preparation for the coming feature of creating dynamically an XML
description for the ARM sysregs.
A register has ARM_CP_NO_GDB enabled will not be shown in the dynamic XML.
This bit is enabled automatically when creating CP_ANY wildcard aliases.
This bit could be enabled manually for any register we want to remove from the
dynamic XML description.
Signed-off-by: Abdallah Bouassida <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
---
target/arm/cpu.h | 3 ++-
target/arm/helper.c | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 2b97408..818a98a 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1796,10 +1796,11 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid)
#define ARM_LAST_SPECIAL ARM_CP_DC_ZVA
#define ARM_CP_FPU 0x1000
#define ARM_CP_SVE 0x2000
+#define ARM_CP_NO_GDB 0x4000
/* Used only as a terminator for ARMCPRegInfo lists */
#define ARM_CP_SENTINEL 0xffff
/* Mask of only the flag bits in a type field */
-#define ARM_CP_FLAG_MASK 0x30ff
+#define ARM_CP_FLAG_MASK 0x70ff
/* Valid values for ARMCPRegInfo state field, indicating which of
* the AArch32 and AArch64 execution states this register is visible in.
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c82f63d..c5d62c8 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5663,7 +5663,7 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, const
ARMCPRegInfo *r,
if (((r->crm == CP_ANY) && crm != 0) ||
((r->opc1 == CP_ANY) && opc1 != 0) ||
((r->opc2 == CP_ANY) && opc2 != 0)) {
- r2->type |= ARM_CP_ALIAS;
+ r2->type |= ARM_CP_ALIAS | ARM_CP_NO_GDB;
}
/* Check that raw accesses are either forbidden or handled. Note that
--
2.7.4