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[Qemu-devel] [PULL 16/25] target/arm: Add "-cpu max" support
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 16/25] target/arm: Add "-cpu max" support |
Date: |
Fri, 9 Mar 2018 17:26:13 +0000 |
Add support for "-cpu max" for ARM guests. This CPU type behaves
like "-cpu host" when KVM is enabled, and like a system CPU with
the maximum possible feature set otherwise. (Note that this means
it won't be migratable across versions, as we will likely add
features to it in future.)
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
---
target/arm/cpu-qom.h | 2 ++
target/arm/cpu.c | 24 ++++++++++++++++++++++++
target/arm/cpu64.c | 21 +++++++++++++++++++++
3 files changed, 47 insertions(+)
diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h
index a42495bac9..d135ff8e06 100644
--- a/target/arm/cpu-qom.h
+++ b/target/arm/cpu-qom.h
@@ -33,6 +33,8 @@ struct arm_boot_info;
#define ARM_CPU_GET_CLASS(obj) \
OBJECT_GET_CLASS(ARMCPUClass, (obj), TYPE_ARM_CPU)
+#define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU
+
/**
* ARMCPUClass:
* @parent_realize: The parent class' realize handler.
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 5d76844981..2292ad91f6 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1702,6 +1702,27 @@ static void pxa270c5_initfn(Object *obj)
cpu->reset_sctlr = 0x00000078;
}
+#ifndef TARGET_AARCH64
+/* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);
+ * otherwise, a CPU with as many features enabled as our emulation supports.
+ * The version of '-cpu max' for qemu-system-aarch64 is defined in cpu64.c;
+ * this only needs to handle 32 bits.
+ */
+static void arm_max_initfn(Object *obj)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ if (kvm_enabled()) {
+ kvm_arm_set_cpu_features_from_host(cpu);
+ } else {
+ cortex_a15_initfn(obj);
+ /* In future we might add feature bits here even if the
+ * real-world A15 doesn't implement them.
+ */
+ }
+}
+#endif
+
#ifdef CONFIG_USER_ONLY
static void arm_any_initfn(Object *obj)
{
@@ -1769,6 +1790,9 @@ static const ARMCPUInfo arm_cpus[] = {
{ .name = "pxa270-b1", .initfn = pxa270b1_initfn },
{ .name = "pxa270-c0", .initfn = pxa270c0_initfn },
{ .name = "pxa270-c5", .initfn = pxa270c5_initfn },
+#ifndef TARGET_AARCH64
+ { .name = "max", .initfn = arm_max_initfn },
+#endif
#ifdef CONFIG_USER_ONLY
{ .name = "any", .initfn = arm_any_initfn },
#endif
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index f12a485820..89b2f4eaed 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -28,6 +28,7 @@
#include "hw/arm/arm.h"
#include "sysemu/sysemu.h"
#include "sysemu/kvm.h"
+#include "kvm_arm.h"
static inline void set_feature(CPUARMState *env, int feature)
{
@@ -214,6 +215,25 @@ static void aarch64_a53_initfn(Object *obj)
define_arm_cp_regs(cpu, cortex_a57_a53_cp_reginfo);
}
+/* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);
+ * otherwise, a CPU with as many features enabled as our emulation supports.
+ * The version of '-cpu max' for qemu-system-arm is defined in cpu.c;
+ * this only needs to handle 64 bits.
+ */
+static void aarch64_max_initfn(Object *obj)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ if (kvm_enabled()) {
+ kvm_arm_set_cpu_features_from_host(cpu);
+ } else {
+ aarch64_a57_initfn(obj);
+ /* In future we might add feature bits here even if the
+ * real-world A57 doesn't implement them.
+ */
+ }
+}
+
#ifdef CONFIG_USER_ONLY
static void aarch64_any_initfn(Object *obj)
{
@@ -249,6 +269,7 @@ typedef struct ARMCPUInfo {
static const ARMCPUInfo aarch64_cpus[] = {
{ .name = "cortex-a57", .initfn = aarch64_a57_initfn },
{ .name = "cortex-a53", .initfn = aarch64_a53_initfn },
+ { .name = "max", .initfn = aarch64_max_initfn },
#ifdef CONFIG_USER_ONLY
{ .name = "any", .initfn = aarch64_any_initfn },
#endif
--
2.16.2
- [Qemu-devel] [PULL 00/25] target-arm queue, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 11/25] hw/arm: Use more CONFIG switches for the object files, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 12/25] arm: fix load ELF error leak, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 13/25] arm: avoid heap-buffer-overflow in load_aarch64_image, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 10/25] aarch64-linux-user: Add support for SVE signal frame records, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 15/25] target/arm: Move definition of 'host' cpu type into cpu.c, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 09/25] aarch64-linux-user: Add support for EXTRA signal frame records, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 19/25] hw/arm/virt: Support -machine gic-version=max, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 16/25] target/arm: Add "-cpu max" support,
Peter Maydell <=
- [Qemu-devel] [PULL 08/25] aarch64-linux-user: Remove struct target_aux_context, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 06/25] linux-user: Implement aarch64 PR_SVE_SET/GET_VL, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 07/25] aarch64-linux-user: Split out helpers for guest signal handling, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 02/25] hw/arm: Set the core count for Xilinx's ZynqMP, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 22/25] sdcard: Display which protocol is used when tracing (SD or SPI), Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 21/25] sdcard: Display command name when tracing CMD/ACMD, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 01/25] target/arm: Add a core count property, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 14/25] target/arm: Query host CPU features on-demand at instance init, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 05/25] Implement support for i.MX7 Sabre board, Peter Maydell, 2018/03/09
- [Qemu-devel] [PULL 18/25] hw/arm/virt: Add "max" to the list of CPU types "virt" supports, Peter Maydell, 2018/03/09