[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v1 14/22] RISC-V: Make virt header comment title con
From: |
Michael Clark |
Subject: |
[Qemu-devel] [PATCH v1 14/22] RISC-V: Make virt header comment title consistent |
Date: |
Wed, 7 Mar 2018 09:56:22 +1300 |
Signed-off-by: Michael Clark <address@hidden>
Signed-off-by: Palmer Dabbelt <address@hidden>
---
include/hw/riscv/virt.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
index d22f184..dcb697f 100644
--- a/include/hw/riscv/virt.h
+++ b/include/hw/riscv/virt.h
@@ -1,5 +1,5 @@
/*
- * SiFive VirtIO Board
+ * QEMU RISC-V VirtIO machine interface
*
* Copyright (c) 2017 SiFive, Inc.
*
--
2.7.0
- [Qemu-devel] [PATCH v1 03/22] RISC-V: Make virt board description match spike, (continued)
- [Qemu-devel] [PATCH v1 03/22] RISC-V: Make virt board description match spike, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 04/22] RISC-V: Use ROM base address and size from memmap, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 05/22] RISC-V: Remove identity_translate from load_elf, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 06/22] RISC-V: Mark ROM read-only after copying in code, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 07/22] RISC-V: Remove unused class definitions, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 08/22] RISC-V: Make sure rom has space for fdt, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 09/22] RISC-V: Include hexidecimal in disassembly, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 10/22] RISC-V: Hold rcu_read_lock when accessing memory, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 11/22] RISC-V: Improve page table walker spec compliance, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 12/22] RISC-V: Update E order and I extension order, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 14/22] RISC-V: Make virt header comment title consistent,
Michael Clark <=
- [Qemu-devel] [PATCH v1 13/22] RISC-V: Make some header guards more specific, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 15/22] RISC-V: Use memory_region_is_ram in pte update, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 17/22] RISC-V: Hardwire satp to 0 for no-mmu case, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 16/22] RISC-V: Remove EM_RISCV ELF_MACHINE indirection, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 18/22] RISC-V: Remove braces from satp case statement, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 19/22] RISC-V: riscv-qemu port supports sv39 and sv48, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 20/22] RISC-V: vectored traps are optional, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 21/22] RISC-V: No traps on writes to misa/minstret/mcycle, Michael Clark, 2018/03/06
- [Qemu-devel] [PATCH v1 22/22] RISC-V: Remove support for adhoc X_COP interrupt, Michael Clark, 2018/03/06