[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v13 05/30] sdhci: add a check_capab_sdma() qtest
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-devel] [PATCH v13 05/30] sdhci: add a check_capab_sdma() qtest |
Date: |
Tue, 13 Feb 2018 01:07:44 -0300 |
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Stefan Hajnoczi <address@hidden>
---
tests/sdhci-test.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c
index d6eb3c3a48..7c50c0482b 100644
--- a/tests/sdhci-test.c
+++ b/tests/sdhci-test.c
@@ -15,6 +15,7 @@
#define SDHC_CAPAB 0x40
FIELD(SDHC_CAPAB, BASECLKFREQ, 8, 8); /* since v2 */
+FIELD(SDHC_CAPAB, SDMA, 22, 1);
#define SDHC_HCVER 0xFE
static const struct sdhci_t {
@@ -111,6 +112,15 @@ static void check_capab_baseclock(QSDHCI *s, uint8_t
expected_freq)
g_assert_cmpuint(capab_freq, ==, expected_freq);
}
+static void check_capab_sdma(QSDHCI *s, bool supported)
+{
+ uint64_t capab, capab_sdma;
+
+ capab = sdhci_readq(s, SDHC_CAPAB);
+ capab_sdma = FIELD_EX64(capab, SDHC_CAPAB, SDMA);
+ g_assert_cmpuint(capab_sdma, ==, supported);
+}
+
static QSDHCI *machine_start(const struct sdhci_t *test)
{
QSDHCI *s = g_new0(QSDHCI, 1);
@@ -158,6 +168,7 @@ static void test_machine(const void *data)
check_capab_capareg(s, test->sdhci.capab.reg);
check_capab_readonly(s);
+ check_capab_sdma(s, test->sdhci.capab.sdma);
check_capab_baseclock(s, test->sdhci.baseclock);
machine_stop(s);
--
2.16.1
- [Qemu-devel] [PATCH v13 00/30] SDHCI: clean v1/2 Specs, UHS-I cards tuning sequence, Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 01/30] sdhci: use error_propagate(local_err) in realize(), Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 02/30] sdhci: add qtest to check the SD capabilities register, Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 03/30] sdhci: add check_capab_readonly() qtest, Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 04/30] sdhci: add a check_capab_baseclock() qtest, Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 05/30] sdhci: add a check_capab_sdma() qtest,
Philippe Mathieu-Daudé <=
- [Qemu-devel] [PATCH v13 06/30] sdhci: add qtest to check the SD Spec version, Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 07/30] sdhci: add a 'spec_version property' (default to v2), Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 08/30] sdhci: use a numeric value for the default CAPAB register, Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 09/30] sdhci: simplify sdhci_get_fifolen(), Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 10/30] sdhci: check the Spec v1 capabilities correctness, Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 12/30] sdhci: Fix 64-bit ADMA2, Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 14/30] hw/arm/exynos4210: access the 64-bit capareg with qdev_prop_set_uint64(), Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 15/30] hw/arm/exynos4210: add a comment about a very similar SDHCI (Spec. v2), Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 16/30] hw/arm/xilinx_zynq: fix the capabilities register to match the datasheet, Philippe Mathieu-Daudé, 2018/02/12
- [Qemu-devel] [PATCH v13 18/30] sdhci: rename the hostctl1 register, Philippe Mathieu-Daudé, 2018/02/12