Re: [Qemu-devel] [PATCH v2 00/16] target/arm: Prepatory work for SVE

[no-reply]

Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v2 00/16] target/arm: Prepatory work for SVE

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

git config --local diff.renamelimit 0
git config --local diff.renames True

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]               patchew/address@hidden -> patchew/address@hidden
 * [new tag]               patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
6308b3eb42 target/arm: Add SVE state to TB->FLAGS
bc0bf3ebae target/arm: Simplify fp_exception_el for user-only
9cdaf60c2f target/arm: Hoist store to flags output in cpu_get_tb_cpu_state
1547b70c1e target/arm: Move cpu_get_tb_cpu_state out of line
b01bb5ca6b target/arm: Add ZCR_ELx
a42658d26a target/arm: Add SVE to migration state
03a80b68c0 target/arm: Add ARM_FEATURE_SVE
a396b26009 target/arm: Add predicate registers for SVE
0ccce9b3c9 target/arm: Expand vector registers for SVE
aea9739609 vmstate: Add VMSTATE_UINT64_SUB_ARRAY
119ea30dc0 target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers
2acd7c7cec target/arm: Change the type of vfp.regs
ae2da084a4 target/arm: Use pointers in neon tbl helper
af4b1905c4 target/arm: Use pointers in neon zip/uzp helpers
9228c6c201 target/arm: Use pointers in crypto helpers
164bf2cd53 target/arm: Mark disas_set_insn_syndrome inline

=== OUTPUT BEGIN ===
Checking PATCH 1/16: target/arm: Mark disas_set_insn_syndrome inline...
Checking PATCH 2/16: target/arm: Use pointers in crypto helpers...
Checking PATCH 3/16: target/arm: Use pointers in neon zip/uzp helpers...
ERROR: trailing whitespace
#315: FILE: target/arm/translate.c:4691:
+    $

total: 1 errors, 0 warnings, 373 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 4/16: target/arm: Use pointers in neon tbl helper...
Checking PATCH 5/16: target/arm: Change the type of vfp.regs...
Checking PATCH 6/16: target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers...
ERROR: spaces required around that '*' (ctx:VxV)
#82: FILE: target/arm/arch_dump.c:104:
+        note.vfp.vregs[2*i + 0] = cpu_to_dump64(s, q[0]);
                         ^

ERROR: spaces required around that '*' (ctx:VxV)
#83: FILE: target/arm/arch_dump.c:105:
+        note.vfp.vregs[2*i + 1] = cpu_to_dump64(s, q[1]);
                         ^

total: 2 errors, 0 warnings, 327 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 7/16: vmstate: Add VMSTATE_UINT64_SUB_ARRAY...
Checking PATCH 8/16: target/arm: Expand vector registers for SVE...
Checking PATCH 9/16: target/arm: Add predicate registers for SVE...
Checking PATCH 10/16: target/arm: Add ARM_FEATURE_SVE...
Checking PATCH 11/16: target/arm: Add SVE to migration state...
Checking PATCH 12/16: target/arm: Add ZCR_ELx...
Checking PATCH 13/16: target/arm: Move cpu_get_tb_cpu_state out of line...
Checking PATCH 14/16: target/arm: Hoist store to flags output in 
cpu_get_tb_cpu_state...
Checking PATCH 15/16: target/arm: Simplify fp_exception_el for user-only...
Checking PATCH 16/16: target/arm: Add SVE state to TB->FLAGS...
=== OUTPUT END ===

Test command exited with code: 1


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