Re: [Qemu-devel] [PULL v4 12/29] intel-iommu: Extend address width to 48 bits

[Michael S. Tsirkin]

On Fri, Jan 19, 2018 at 11:34:57AM +0800, Jason Wang wrote:
> 
> 
> On 2018年01月19日 04:45, Michael S. Tsirkin wrote:
> > From: Prasad Singamsetty<address@hidden>
> > 
> > The current implementation of Intel IOMMU code only supports 39 bits
> > iova address width. This patch provides a new parameter (x-aw-bits)
> > for intel-iommu to extend its address width to 48 bits but keeping the
> > default the same (39 bits). The reason for not changing the default
> > is to avoid potential compatibility problems with live migration of
> > intel-iommu enabled QEMU guest. The only valid values for 'x-aw-bits'
> > parameter are 39 and 48.
> > 
> > After enabling larger address width (48), we should be able to map
> > larger iova addresses in the guest. For example, a QEMU guest that
> > is configured with large memory ( >=1TB ). To check whether 48 bits
> > aw is enabled, we can grep in the guest dmesg output with line:
> > "DMAR: Host address width 48".
> > 
> > Signed-off-by: Prasad Singamsetty<address@hidden>
> > Reviewed-by: Peter Xu<address@hidden>
> > Reviewed-by: Michael S. Tsirkin<address@hidden>
> > Signed-off-by: Michael S. Tsirkin<address@hidden>
> > ---
> >   hw/i386/intel_iommu_internal.h |   9 ++--
> >   include/hw/i386/intel_iommu.h  |   1 +
> >   hw/i386/acpi-build.c           |   3 +-
> >   hw/i386/intel_iommu.c          | 101 
> > ++++++++++++++++++++++++-----------------
> >   4 files changed, 65 insertions(+), 49 deletions(-)
> > 
> 
> [...]
> 
> >   /* DMA Remapping Fault Conditions */
> >   typedef enum VTDFaultReason {
> > @@ -360,8 +358,7 @@ typedef union VTDInvDesc VTDInvDesc;
> >   #define VTD_INV_DESC_IOTLB_DOMAIN       (2ULL << 4)
> >   #define VTD_INV_DESC_IOTLB_PAGE         (3ULL << 4)
> >   #define VTD_INV_DESC_IOTLB_DID(val)     (((val) >> 16) & 
> > VTD_DOMAIN_ID_MASK)
> > -#define VTD_INV_DESC_IOTLB_ADDR(val)    ((val) & ~0xfffULL & \
> > -                                         ((1ULL << VTD_MGAW) - 1))
> > +#define VTD_INV_DESC_IOTLB_ADDR(val)    ((val) & ~0xfffULL)
> >   #define VTD_INV_DESC_IOTLB_AM(val)      ((val) & 0x3fULL)
> >   #define VTD_INV_DESC_IOTLB_RSVD_LO      0xffffffff0000ff00ULL
> >   #define VTD_INV_DESC_IOTLB_RSVD_HI      0xf80ULL
> > diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
> > index 372b06d..45ec891 100644
> > --- a/include/hw/i386/intel_iommu.h
> > +++ b/include/hw/i386/intel_iommu.h
> > @@ -304,6 +304,7 @@ struct IntelIOMMUState {
> >       bool intr_eime;                 /* Extended interrupt mode enabled */
> >       OnOffAuto intr_eim;             /* Toggle for EIM cabability */
> >       bool buggy_eim;                 /* Force buggy EIM unless eim=off */
> > +    uint8_t aw_bits;                /* Host/IOVA address width (in bits) */
> >   };
> 
> Consider it's guest visible, do we need to migrate this ?
> 
> Thanks

I think it's a read-only constant so I guess no.

-- 
MST