[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v10.5 00/20] tcg: generic vector operations
|
From: |
Richard Henderson |
|
Subject: |
[Qemu-devel] [PATCH v10.5 00/20] tcg: generic vector operations |
|
Date: |
Wed, 17 Jan 2018 08:14:15 -0800 |
Changes since v10:
* Squashed a fixup patch which escaped my attention while preparing
the patch set. Ho hum.
Changes since v9:
* Detect whether __attribute__((vector_size(16))) operations are
supported by the host compiler. This includes the case affecting
ppc64 where gcc-4.8.5 crashes. Note that gcc-7.2 does pass the
test on ppc64.
* Dropped support for vector interleaves and element size changes.
My target/arm patches were failing RISU checks on a big-endian host.
I need to re-think what to do about host endianness and target
representation of vector operations crossing lanes. For now, only
support generic vector operations that are agnostic to element order.
r~
Richard Henderson (21):
tcg: Allow multiple word entries into the constant pool
tcg: Add types and basic operations for host vectors
tcg: Standardize integral arguments to expanders
tcg: Add generic vector expanders
tcg: Loosen vec_gen_op* typecheck rules
tcg: Add generic vector ops for constant shifts
tcg: Add generic vector ops for comparisons
tcg: Add generic vector ops for multiplication
tcg: Add generic helpers for saturating arithmetic
tcg: Add generic vector helpers with a scalar operand
tcg/optimize: Handle vector opcodes during optimize
target/arm: Align vector registers
target/arm: Use vector infrastructure for aa64 add/sub/logic
target/arm: Use vector infrastructure for aa64 mov/not/neg
target/arm: Use vector infrastructure for aa64 dup/movi
target/arm: Use vector infrastructure for aa64 constant shifts
target/arm: Use vector infrastructure for aa64 compares
target/arm: Use vector infrastructure for aa64 multiplies
target/arm: Use vector infrastructure for aa64 orr/bic immediate
tcg/i386: Add vector operations
tcg/aarch64: Add vector operations
Makefile.target | 4 +-
accel/tcg/tcg-runtime.h | 118 +++
target/arm/cpu.h | 2 +-
tcg/aarch64/tcg-target.h | 25 +-
tcg/aarch64/tcg-target.opc.h | 3 +
tcg/i386/tcg-target.h | 41 +-
tcg/i386/tcg-target.opc.h | 13 +
tcg/tcg-gvec-desc.h | 49 +
tcg/tcg-op-gvec.h | 297 ++++++
tcg/tcg-op.h | 55 +-
tcg/tcg-opc.h | 47 +
tcg/tcg.h | 78 ++
accel/tcg/tcg-runtime-gvec.c | 997 +++++++++++++++++++
target/arm/translate-a64.c | 974 +++++++++++++-----
tcg/aarch64/tcg-target.inc.c | 607 +++++++++++-
tcg/i386/tcg-target.inc.c | 1043 +++++++++++++++++++-
tcg/optimize.c | 150 +--
tcg/tcg-op-gvec.c | 2226 ++++++++++++++++++++++++++++++++++++++++++
tcg/tcg-op-vec.c | 474 +++++++++
tcg/tcg-op.c | 42 +-
tcg/tcg-pool.inc.c | 115 ++-
tcg/tcg.c | 129 ++-
accel/tcg/Makefile.objs | 2 +-
configure | 48 +
tcg/README | 95 ++
25 files changed, 7151 insertions(+), 483 deletions(-)
create mode 100644 tcg/aarch64/tcg-target.opc.h
create mode 100644 tcg/i386/tcg-target.opc.h
create mode 100644 tcg/tcg-gvec-desc.h
create mode 100644 tcg/tcg-op-gvec.h
create mode 100644 accel/tcg/tcg-runtime-gvec.c
create mode 100644 tcg/tcg-op-gvec.c
create mode 100644 tcg/tcg-op-vec.c
--
2.14.3
Richard Henderson (20):
tcg: Allow multiple word entries into the constant pool
tcg: Add types and basic operations for host vectors
tcg: Standardize integral arguments to expanders
tcg: Add generic vector expanders
tcg: Add generic vector ops for constant shifts
tcg: Add generic vector ops for comparisons
tcg: Add generic vector ops for multiplication
tcg: Add generic helpers for saturating arithmetic
tcg: Add generic vector helpers with a scalar operand
tcg/optimize: Handle vector opcodes during optimize
target/arm: Align vector registers
target/arm: Use vector infrastructure for aa64 add/sub/logic
target/arm: Use vector infrastructure for aa64 mov/not/neg
target/arm: Use vector infrastructure for aa64 dup/movi
target/arm: Use vector infrastructure for aa64 constant shifts
target/arm: Use vector infrastructure for aa64 compares
target/arm: Use vector infrastructure for aa64 multiplies
target/arm: Use vector infrastructure for aa64 orr/bic immediate
tcg/i386: Add vector operations
tcg/aarch64: Add vector operations
Makefile.target | 4 +-
accel/tcg/tcg-runtime.h | 118 +++
target/arm/cpu.h | 2 +-
tcg/aarch64/tcg-target.h | 25 +-
tcg/aarch64/tcg-target.opc.h | 3 +
tcg/i386/tcg-target.h | 41 +-
tcg/i386/tcg-target.opc.h | 13 +
tcg/tcg-gvec-desc.h | 49 +
tcg/tcg-op-gvec.h | 297 ++++++
tcg/tcg-op.h | 55 +-
tcg/tcg-opc.h | 47 +
tcg/tcg.h | 78 ++
accel/tcg/tcg-runtime-gvec.c | 997 +++++++++++++++++++
target/arm/translate-a64.c | 974 +++++++++++++-----
tcg/aarch64/tcg-target.inc.c | 607 +++++++++++-
tcg/i386/tcg-target.inc.c | 1043 +++++++++++++++++++-
tcg/optimize.c | 150 +--
tcg/tcg-op-gvec.c | 2226 ++++++++++++++++++++++++++++++++++++++++++
tcg/tcg-op-vec.c | 474 +++++++++
tcg/tcg-op.c | 42 +-
tcg/tcg-pool.inc.c | 115 ++-
tcg/tcg.c | 129 ++-
accel/tcg/Makefile.objs | 2 +-
configure | 48 +
tcg/README | 95 ++
25 files changed, 7151 insertions(+), 483 deletions(-)
create mode 100644 tcg/aarch64/tcg-target.opc.h
create mode 100644 tcg/i386/tcg-target.opc.h
create mode 100644 tcg/tcg-gvec-desc.h
create mode 100644 tcg/tcg-op-gvec.h
create mode 100644 accel/tcg/tcg-runtime-gvec.c
create mode 100644 tcg/tcg-op-gvec.c
create mode 100644 tcg/tcg-op-vec.c
--
2.14.3