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Re: [Qemu-devel] [PATCH 0/7] CPU model updates for CVE-2017-5715 (Spectr
From: |
Eduardo Habkost |
Subject: |
Re: [Qemu-devel] [PATCH 0/7] CPU model updates for CVE-2017-5715 (Spectre variant #2) |
Date: |
Fri, 12 Jan 2018 17:50:50 -0200 |
User-agent: |
Mutt/1.9.1 (2017-09-22) |
I'm queueing patches 1-5 on x86-next.
On Tue, Jan 09, 2018 at 01:45:12PM -0200, Eduardo Habkost wrote:
> This series adds support for the new IA32_SPEC_CTRL MSR on Intel
> CPU models. The new MSR and the spec-ctrl CPUID bit
> (CPUID[EAX=7,ECX=0].EDX[bit 26]) were introduced by a recent
> Intel microcode updated and can be used by OSes to mitigate
> CVE-2017-5715.
>
> It also adds a new EPYC-IBPB CPU model that includes
> CPUID[0x80000008].EBX[bit 12] (IBPB). That patch is a RFC
> because I couldn't find any detailed info on the new CPUID bit
> and the IA32_PRED_CMD MSR.
>
> Additionally, the last patch on this series changes the new
> Westmere-IBRS, SandyBridge-IBRS and IvyBridge-IBRS to include the
> PCID feature, because PCID helps to reduce the performance impact
> of KPTI on the guest. The patch is also a RFC because we need to
> confirm if all Westmere (and newer) CPUs out there have PCID
> available.
>
> References:
> * https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715
> * Google Security Blog on Meltdown/Spectre mitigations:
>
> https://security.googleblog.com/2018/01/more-details-about-mitigations-for-cpu_4.html
> * Kernel patches to make use of the new MSRs:
> https://www.mail-archive.com/address@hidden/msg1578798.html
> * KVM kernel patches for the new CPUID bits and MSRs:
> https://www.mail-archive.com/address@hidden/msg1580363.html
> * Patches adding PCID to the existing CPU models:
> https://patchew.org/QEMU/address@hidden
> https://patchew.org/QEMU/address@hidden
>
> Eduardo Habkost (6):
> i386: Change X86CPUDefinition::model_id to const char*
> i386: Add spec-ctrl CPUID bit
> i386: Add FEAT_8000_0008_EBX CPUID feature word
> i386: Add new -IBRS versions of Intel CPU models
> [RFC] i386: Add EPYC-IBPB CPU model
> [RFC] i386: Add PCID to {Westmere,SandyBridge,IvyBridge}-IBRS
>
> Paolo Bonzini (1):
> i386: Add support for SPEC_CTRL MSR
>
> target/i386/cpu.h | 7 +
> target/i386/cpu.c | 454
> +++++++++++++++++++++++++++++++++++++++++++++++++-
> target/i386/kvm.c | 14 ++
> target/i386/machine.c | 20 +++
> 4 files changed, 491 insertions(+), 4 deletions(-)
>
> --
> 2.14.3
>
>
--
Eduardo
- [Qemu-devel] [PATCH] fixup! i386: Change X86CPUDefinition::model_id to const char*, (continued)
- [Qemu-devel] [PATCH 2/7] i386: Add support for SPEC_CTRL MSR, Eduardo Habkost, 2018/01/09
- [Qemu-devel] [PATCH 3/7] i386: Add spec-ctrl CPUID bit, Eduardo Habkost, 2018/01/09
- [Qemu-devel] [PATCH 4/7] i386: Add FEAT_8000_0008_EBX CPUID feature word, Eduardo Habkost, 2018/01/09
- [Qemu-devel] [PATCH 6/7] [RFC] i386: Add EPYC-IBPB CPU model, Eduardo Habkost, 2018/01/09
- [Qemu-devel] [PATCH 5/7] i386: Add new -IBRS versions of Intel CPU models, Eduardo Habkost, 2018/01/09
- [Qemu-devel] [PATCH 7/7] [RFC] i386: Add PCID to {Westmere, SandyBridge, IvyBridge}-IBRS, Eduardo Habkost, 2018/01/09
- Re: [Qemu-devel] [PATCH 0/7] CPU model updates for CVE-2017-5715 (Spectre variant #2), no-reply, 2018/01/10
- Re: [Qemu-devel] [PATCH 0/7] CPU model updates for CVE-2017-5715 (Spectre variant #2),
Eduardo Habkost <=
- Re: [Qemu-devel] [PATCH 0/7] CPU model updates for CVE-2017-5715 (Spectre variant #2), Eduardo Habkost, 2018/01/15