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Re: [Qemu-devel] [qemu-s390x] [PATCH 1/6] accel/tcg: add size paremeter
Re: [Qemu-devel] [qemu-s390x] [PATCH 1/6] accel/tcg: add size paremeter in tlb_fill()
Wed, 10 Jan 2018 14:42:42 +0100
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Le 10/01/2018 à 09:43, David Hildenbrand a écrit :
> On 09.01.2018 00:10, Laurent Vivier wrote:
>> The MC68040 MMU provides the size of the access that
>> triggers the page fault.
>> This size is set in the Special Status Word which
>> is written in the stack frame of the access fault
>> So we need the size in m68k_cpu_unassigned_access() and
>> To be able to do that, this patch modifies the prototype of
>> handle_mmu_fault handler, tlb_fill() and probe_write().
>> do_unassigned_access() already includes a size parameter.
>> This patch also updates handle_mmu_fault handlers and
>> tlb_fill() of all targets (only parameter, no code change).
> There are a couple of places where you use "1" (when no other size is
> available). e.g. in get_page_addr_code().
> Wonder if that's the right thing to do - are there any architectures
> that e.g. always fetch at least 2 bytes in these conditions?
It's a good question.
"1" is passed to probe_write() and tlb_fill() and handle_mmu_fault().
probe_write() calls tlb_fill(), and tlb_fill() calls machine
As no existing handle_mmu_fault takes care of the access size, I think
passing 1 and ignoring it doesn't change the existing behavior.
probe_write() is used to check if a page is writable, and none of the
callers is guessing the write can cross a page boundary, so 1 is the
good value in this case.
get_page_addr_code() is the only user of tlb_fill() with 1. and callers
of get_page_addr_code() never guess the code address can run across a
page boundary. Some of them calls get_page_addr_code() a second time to
check this case. So I think using 1 is good solution, but perhaps the
code could be improved by adding the size parameter to get_page_addr_code().
My purpose was not to change the functions behavior, only to add the new
parameter. So using "1" when the size is not obvious is a good solution
Thank you for your comment!
- [Qemu-devel] [PATCH 0/6] target/m68k: supervisor mode (part 2), Laurent Vivier, 2018/01/08
- [Qemu-devel] [PATCH 3/6] target/m68k: add Transparent Translation, Laurent Vivier, 2018/01/08
- [Qemu-devel] [PATCH 5/6] target/m68k: add pflush/ptest, Laurent Vivier, 2018/01/08
- [Qemu-devel] [PATCH 4/6] target/m68k: add moves, Laurent Vivier, 2018/01/08
- [Qemu-devel] [PATCH 2/6] target/m68k: add MC68040 MMU, Laurent Vivier, 2018/01/08
- [Qemu-devel] [PATCH 6/6] target/m68k: add HMP command "info tlb", Laurent Vivier, 2018/01/08
- [Qemu-devel] [PATCH 1/6] accel/tcg: add size paremeter in tlb_fill(), Laurent Vivier, 2018/01/08