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Re: [Qemu-devel] [Qemu-arm] [PATCH 0/2] GICv2 & GICv3: RAZ/WI reserved a

From: Peter Maydell
Subject: Re: [Qemu-devel] [Qemu-arm] [PATCH 0/2] GICv2 & GICv3: RAZ/WI reserved addresses rather than aborting
Date: Tue, 9 Jan 2018 16:12:06 +0000

On 9 January 2018 at 15:58, Laszlo Ersek <address@hidden> wrote:
> Sorry, no clue about any of this -- where should I read up?

I cc'd you mostly as a heads-up since the QEMU bug is UEFI affecting,
not because I wanted to make you read the GIC specs :-)

> Ard did ask a question though:
> https://www.mail-archive.com/address@hidden/msg500055.html

Sounds plausible (my UEFI binary I hit this with is pretty ancient)
but I don't know for certain. It's one of those things that seems
like it's a bug in UEFI (perhaps now fixed) but which is also
definitely a bug in QEMU, and if it is a UEFI bug it's pretty

-- PMM

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