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[Qemu-devel] [PATCH v6 00/26] tcg: generic vector operations
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v6 00/26] tcg: generic vector operations |
Date: |
Tue, 21 Nov 2017 22:25:08 +0100 |
Quite a lot has changed since last time.
The representation has changed such that the vector length and element
size is stored in the TCGOp structure. The functions have changed such
that the element size is passed explicitly rather than being encoded in
the function name.
I've added additional operations for multiply, immediate shifts, compares,
element interleaves, and widening. I believe this is all we'll need for
implementing ARM SVE, so I'll leave off for now.
This has been tested vs aa64 risu on both x86_64 and aa64 hosts.
r~
Richard Henderson (26):
tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED*
tcg: Dynamically allocate TCGOps
tcg: Generalize TCGOp parameters
tcg: Add types and basic operations for host vectors
tcg: Add generic vector expanders
tcg: Allow multiple word entries into the constant pool
tcg: Add tcg_signed_cond
target/arm: Align vector registers
target/arm: Use vector infrastructure for aa64 add/sub/logic
target/arm: Use vector infrastructure for aa64 mov/not/neg
target/arm: Use vector infrastructure for aa64 dup/movi
tcg/i386: Add vector operations
tcg: Add tcg_expand_vec_op and tcg-target.opc.h
tcg: Add generic vector ops for interleave
target/arm: Use vector infrastructure for aa64 zip/uzp/trn/xtn
tcg: Add generic vector ops for constant shifts
target/arm: Use vector infrastructure for aa64 constant shifts
tcg: Add generic vector ops for comparisons
target/arm: Use vector infrastructure for aa64 compares
tcg/i386: Add vector operations/expansions for shift/cmp/interleave
tcg: Add generic vector ops for multiplication
target/arm: Use vector infrastructure for aa64 multiplies
tcg: Add generic vector ops for extension
target/arm: Use vector infrastructure for aa64 widening shifts
tcg/i386: Add vector operations/expansions for mul/extend
tcg/aarch64: Add vector operations
Makefile.target | 4 +-
accel/tcg/tcg-runtime.h | 102 +++
include/exec/gen-icount.h | 9 +-
include/qemu/queue.h | 5 +
target/arm/cpu.h | 2 +-
target/arm/translate.h | 10 +-
tcg/aarch64/tcg-target.h | 30 +-
tcg/aarch64/tcg-target.opc.h | 3 +
tcg/i386/tcg-target.h | 46 +-
tcg/i386/tcg-target.opc.h | 11 +
tcg/tcg-gvec-desc.h | 49 +
tcg/tcg-op-gvec.h | 219 +++++
tcg/tcg-op.h | 55 +-
tcg/tcg-opc.h | 59 ++
tcg/tcg.h | 135 ++-
accel/tcg/tcg-runtime-gvec.c | 616 +++++++++++++
target/alpha/translate.c | 22 +-
target/arm/translate-a64.c | 1135 ++++++++++++++++-------
target/arm/translate.c | 31 +-
target/cris/translate.c | 4 +-
target/hppa/translate.c | 63 +-
target/i386/translate.c | 13 +-
target/lm32/translate.c | 2 -
target/m68k/translate.c | 14 +-
target/microblaze/translate.c | 4 -
target/mips/translate.c | 2 +-
target/nios2/translate.c | 6 +-
target/ppc/translate.c | 2 +-
target/s390x/translate.c | 42 +-
target/sh4/translate.c | 2 +-
target/sparc/translate.c | 2 +-
target/tilegx/translate.c | 10 +-
target/unicore32/translate.c | 4 +-
tcg/aarch64/tcg-target.inc.c | 674 +++++++++++++-
tcg/i386/tcg-target.inc.c | 1325 +++++++++++++++++++++++++--
tcg/optimize.c | 20 +-
tcg/tcg-op-gvec.c | 2010 +++++++++++++++++++++++++++++++++++++++++
tcg/tcg-op-vec.c | 566 ++++++++++++
tcg/tcg-op.c | 24 -
tcg/tcg-pool.inc.c | 115 ++-
tcg/tcg.c | 286 ++++--
accel/tcg/Makefile.objs | 2 +-
tcg/README | 148 +++
43 files changed, 7107 insertions(+), 776 deletions(-)
create mode 100644 tcg/aarch64/tcg-target.opc.h
create mode 100644 tcg/i386/tcg-target.opc.h
create mode 100644 tcg/tcg-gvec-desc.h
create mode 100644 tcg/tcg-op-gvec.h
create mode 100644 accel/tcg/tcg-runtime-gvec.c
create mode 100644 tcg/tcg-op-gvec.c
create mode 100644 tcg/tcg-op-vec.c
--
2.13.6
- [Qemu-devel] [PATCH v6 00/26] tcg: generic vector operations,
Richard Henderson <=
- [Qemu-devel] [PATCH v6 03/26] tcg: Generalize TCGOp parameters, Richard Henderson, 2017/11/21
- [Qemu-devel] [PATCH v6 02/26] tcg: Dynamically allocate TCGOps, Richard Henderson, 2017/11/21
- [Qemu-devel] [PATCH v6 01/26] tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED*, Richard Henderson, 2017/11/21
- [Qemu-devel] [PATCH v6 06/26] tcg: Allow multiple word entries into the constant pool, Richard Henderson, 2017/11/21
- [Qemu-devel] [PATCH v6 07/26] tcg: Add tcg_signed_cond, Richard Henderson, 2017/11/21
- [Qemu-devel] [PATCH v6 04/26] tcg: Add types and basic operations for host vectors, Richard Henderson, 2017/11/21
- [Qemu-devel] [PATCH v6 08/26] target/arm: Align vector registers, Richard Henderson, 2017/11/21
- [Qemu-devel] [PATCH v6 09/26] target/arm: Use vector infrastructure for aa64 add/sub/logic, Richard Henderson, 2017/11/21
- [Qemu-devel] [PATCH v6 11/26] target/arm: Use vector infrastructure for aa64 dup/movi, Richard Henderson, 2017/11/21
- [Qemu-devel] [PATCH v6 10/26] target/arm: Use vector infrastructure for aa64 mov/not/neg, Richard Henderson, 2017/11/21