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[Qemu-devel] [PULL 2/5] xlnx-zcu102: Specify the max number of CPUs
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 2/5] xlnx-zcu102: Specify the max number of CPUs |
Date: |
Tue, 31 Oct 2017 13:11:26 +0000 |
From: Alistair Francis <address@hidden>
Specify the number of CPUs that can run on ZynqMP.
Signed-off-by: Alistair Francis <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/xlnx-zcu102.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index 519a16e..e2d15a1 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -240,6 +240,7 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc,
void *data)
mc->block_default_type = IF_IDE;
mc->units_per_default_bus = 1;
mc->ignore_memory_transaction_failures = true;
+ mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
}
static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
--
2.7.4
- [Qemu-devel] [PULL 0/5] target-arm queue, Peter Maydell, 2017/10/31
- [Qemu-devel] [PULL 5/5] hw/pci-host/gpex: Improve INTX to gsi routing error checking, Peter Maydell, 2017/10/31
- [Qemu-devel] [PULL 3/5] msf2: Remove dead code reported by Coverity, Peter Maydell, 2017/10/31
- [Qemu-devel] [PULL 4/5] msf2: Wire up SYSRESETREQ in SoC for system reset, Peter Maydell, 2017/10/31
- [Qemu-devel] [PULL 1/5] fix WFI/WFE length in syndrome register, Peter Maydell, 2017/10/31
- [Qemu-devel] [PULL 2/5] xlnx-zcu102: Specify the max number of CPUs,
Peter Maydell <=
- Re: [Qemu-devel] [PULL 0/5] target-arm queue, Peter Maydell, 2017/10/31