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[Qemu-devel] [RFC PATCH 04/30] target/arm/cpu.h: update comment for half
From: |
Alex Bennée |
Subject: |
[Qemu-devel] [RFC PATCH 04/30] target/arm/cpu.h: update comment for half-precision values |
Date: |
Fri, 13 Oct 2017 17:24:12 +0100 |
Signed-off-by: Alex Bennée <address@hidden>
---
target/arm/cpu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 3a0f27c782..521b82d46e 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -488,6 +488,7 @@ typedef struct CPUARMState {
* Qn = regs[2n+1]:regs[2n]
* Dn = regs[2n]
* Sn = regs[2n] bits 31..0
+ * Hn = regs[2n] bits 15..0 for even n, and bits 31..16 for odd n
* This corresponds to the architecturally defined mapping between
* the two execution states, and means we do not need to explicitly
* map these registers when changing states.
--
2.14.1
- [Qemu-devel] [RFC PATCH 00/30] v8.2 half-precision support (work-in-progress), Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 03/30] include/exec/helper-head.h: support f16 in helper calls, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 01/30] linux-user/main: support dfilter, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 04/30] target/arm/cpu.h: update comment for half-precision values,
Alex Bennée <=
- [Qemu-devel] [RFC PATCH 06/30] fpu/softfloat: implement float16_squash_input_denormal, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 02/30] arm: introduce ARM_V8_FP16 feature bit, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 07/30] fpu/softfloat: implement float16_abs helper, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 05/30] softfloat: implement propagateFloat16NaN, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 08/30] softfloat: add half-precision expansions for MINMAX fns, Alex Bennée, 2017/10/13