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[Qemu-devel] [PULL 01/20] arm: Fix SMC reporting to EL2 when QEMU provid
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI |
Date: |
Fri, 6 Oct 2017 16:59:26 +0100 |
From: Jan Kiszka <address@hidden>
This properly forwards SMC events to EL2 when PSCI is provided by QEMU
itself and, thus, ARM_FEATURE_EL3 is off.
Found and tested with the Jailhouse hypervisor. Solution based on
suggestions by Peter Maydell.
Signed-off-by: Jan Kiszka <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 9 ++++++++-
target/arm/op_helper.c | 27 +++++++++++++++++----------
2 files changed, 25 insertions(+), 11 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 8be78ea..0b9c9fd 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -3717,7 +3717,14 @@ static void hcr_write(CPUARMState *env, const
ARMCPRegInfo *ri, uint64_t value)
if (arm_feature(env, ARM_FEATURE_EL3)) {
valid_mask &= ~HCR_HCD;
- } else {
+ } else if (cpu->psci_conduit != QEMU_PSCI_CONDUIT_SMC) {
+ /* Architecturally HCR.TSC is RES0 if EL3 is not implemented.
+ * However, if we're using the SMC PSCI conduit then QEMU is
+ * effectively acting like EL3 firmware and so the guest at
+ * EL2 should retain the ability to prevent EL1 from being
+ * able to make SMC calls into the ersatz firmware, so in
+ * that case HCR.TSC should be read/write.
+ */
valid_mask &= ~HCR_TSC;
}
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index 6a60464..3914145 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -953,22 +953,29 @@ void HELPER(pre_smc)(CPUARMState *env, uint32_t syndrome)
*/
bool undef = arm_feature(env, ARM_FEATURE_AARCH64) ? smd : smd && !secure;
- if (arm_is_psci_call(cpu, EXCP_SMC)) {
- /* If PSCI is enabled and this looks like a valid PSCI call then
- * that overrides the architecturally mandated SMC behaviour.
+ if (!arm_feature(env, ARM_FEATURE_EL3) &&
+ cpu->psci_conduit != QEMU_PSCI_CONDUIT_SMC) {
+ /* If we have no EL3 then SMC always UNDEFs and can't be
+ * trapped to EL2. PSCI-via-SMC is a sort of ersatz EL3
+ * firmware within QEMU, and we want an EL2 guest to be able
+ * to forbid its EL1 from making PSCI calls into QEMU's
+ * "firmware" via HCR.TSC, so for these purposes treat
+ * PSCI-via-SMC as implying an EL3.
*/
- return;
- }
-
- if (!arm_feature(env, ARM_FEATURE_EL3)) {
- /* If we have no EL3 then SMC always UNDEFs */
undef = true;
} else if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) {
- /* In NS EL1, HCR controlled routing to EL2 has priority over SMD. */
+ /* In NS EL1, HCR controlled routing to EL2 has priority over SMD.
+ * We also want an EL2 guest to be able to forbid its EL1 from
+ * making PSCI calls into QEMU's "firmware" via HCR.TSC.
+ */
raise_exception(env, EXCP_HYP_TRAP, syndrome, 2);
}
- if (undef) {
+ /* If PSCI is enabled and this looks like a valid PSCI call then
+ * suppress the UNDEF -- we'll catch the SMC exception and
+ * implement the PSCI call behaviour there.
+ */
+ if (undef && !arm_is_psci_call(cpu, EXCP_SMC)) {
raise_exception(env, EXCP_UDEF, syn_uncategorized(),
exception_target_el(env));
}
--
2.7.4
- [Qemu-devel] [PULL 10/20] target/arm: Warn about restoring to unaligned stack, (continued)
- [Qemu-devel] [PULL 10/20] target/arm: Warn about restoring to unaligned stack, Peter Maydell, 2017/10/06
- [Qemu-devel] [PULL 11/20] target/arm: Don't warn about exception return with PC low bit set for v8M, Peter Maydell, 2017/10/06
- [Qemu-devel] [PULL 08/20] target/arm: Restore SPSEL to correct CONTROL register on exception return, Peter Maydell, 2017/10/06
- [Qemu-devel] [PULL 03/20] hw/arm/xlnx-zynqmp: Mark the "xlnx, zynqmp" device with user_creatable = false, Peter Maydell, 2017/10/06
- [Qemu-devel] [PULL 04/20] nvic: Clear the vector arrays and prigroup on reset, Peter Maydell, 2017/10/06
- [Qemu-devel] [PULL 20/20] nvic: Add missing code for writing SHCSR.HARDFAULTPENDED bit, Peter Maydell, 2017/10/06
- [Qemu-devel] [PULL 02/20] hw/sd: fix out-of-bounds check for multi block reads, Peter Maydell, 2017/10/06
- [Qemu-devel] [PULL 07/20] target/arm: Restore security state on exception return, Peter Maydell, 2017/10/06
- [Qemu-devel] [PULL 19/20] target/arm: Factor out "get mmuidx for specified security state", Peter Maydell, 2017/10/06
- [Qemu-devel] [PULL 17/20] target/arm: Implement security attribute lookups for memory accesses, Peter Maydell, 2017/10/06
- [Qemu-devel] [PULL 01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI,
Peter Maydell <=
- [Qemu-devel] [PULL 05/20] target/arm: Don't switch to target stack early in v7M exception return, Peter Maydell, 2017/10/06
- [Qemu-devel] [PULL 06/20] target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode, Peter Maydell, 2017/10/06
- Re: [Qemu-devel] [PULL 00/20] target-arm queue, Peter Maydell, 2017/10/06