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[Qemu-devel] [PATCH] hw/gen_pcie_root_port: properly set
From: |
Marcel Apfelbaum |
Subject: |
[Qemu-devel] [PATCH] hw/gen_pcie_root_port: properly set |
Date: |
Mon, 2 Oct 2017 13:31:35 +0300 |
IO_LIMIT and IO_BASE registers should not be writable if
gen_pcie_root_port's io-reserve property is set to 0.
The COMMAND register should have the IO flag read only.
Signed-off-by: Marcel Apfelbaum <address@hidden>
---
hw/pci-bridge/gen_pcie_root_port.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/hw/pci-bridge/gen_pcie_root_port.c
b/hw/pci-bridge/gen_pcie_root_port.c
index ed03ffc764..ad4e6aa7ff 100644
--- a/hw/pci-bridge/gen_pcie_root_port.c
+++ b/hw/pci-bridge/gen_pcie_root_port.c
@@ -85,6 +85,13 @@ static void gen_rp_realize(DeviceState *dev, Error **errp)
rpc->parent_class.exit(d);
return;
}
+
+ if (!grp->io_reserve) {
+ pci_word_test_and_clear_mask(d->wmask + PCI_COMMAND,
+ PCI_COMMAND_IO);
+ d->wmask[PCI_IO_BASE] = 0;
+ d->wmask[PCI_IO_LIMIT] = 0;
+ }
}
static const VMStateDescription vmstate_rp_dev = {
--
2.13.5
- [Qemu-devel] [PATCH] hw/gen_pcie_root_port: properly set,
Marcel Apfelbaum <=