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[Qemu-devel] [PULL 03/31] nvic: Add cached vectpending_is_s_banked state
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 03/31] nvic: Add cached vectpending_is_s_banked state |
Date: |
Thu, 21 Sep 2017 17:41:11 +0100 |
With banked exceptions, just the exception number in
s->vectpending is no longer sufficient to uniquely identify
the pending exception. Add a vectpending_is_s_banked bool
which is true if the exception is using the sec_vectors[]
array.
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
---
include/hw/intc/armv7m_nvic.h | 11 +++++++++--
hw/intc/armv7m_nvic.c | 1 +
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/include/hw/intc/armv7m_nvic.h b/include/hw/intc/armv7m_nvic.h
index 317601e..87c78b3 100644
--- a/include/hw/intc/armv7m_nvic.h
+++ b/include/hw/intc/armv7m_nvic.h
@@ -57,10 +57,17 @@ typedef struct NVICState {
VecInfo sec_vectors[NVIC_INTERNAL_VECTORS];
uint32_t prigroup;
- /* vectpending and exception_prio are both cached state that can
- * be recalculated from the vectors[] array and the prigroup field.
+ /* The following fields are all cached state that can be recalculated
+ * from the vectors[] and sec_vectors[] arrays and the prigroup field:
+ * - vectpending
+ * - vectpending_is_secure
+ * - exception_prio
*/
unsigned int vectpending; /* highest prio pending enabled exception */
+ /* true if vectpending is a banked secure exception, ie it is in
+ * sec_vectors[] rather than vectors[]
+ */
+ bool vectpending_is_s_banked;
int exception_prio; /* group prio of the highest prio active exception */
MemoryRegion sysregmem;
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 8793f75..a11df3d 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -1254,6 +1254,7 @@ static void armv7m_nvic_reset(DeviceState *dev)
s->exception_prio = NVIC_NOEXC_PRIO;
s->vectpending = 0;
+ s->vectpending_is_s_banked = false;
}
static void nvic_systick_trigger(void *opaque, int n, int level)
--
2.7.4
- [Qemu-devel] [PULL 24/31] hw/timer/omap_gptimer: Don't use old_mmio, (continued)
- [Qemu-devel] [PULL 24/31] hw/timer/omap_gptimer: Don't use old_mmio, Peter Maydell, 2017/09/21
- [Qemu-devel] [PULL 07/31] nvic: Implement NVIC_ITNS<n> registers, Peter Maydell, 2017/09/21
- [Qemu-devel] [PULL 18/31] nvic: Make SHCSR banked for v8M, Peter Maydell, 2017/09/21
- [Qemu-devel] [PULL 29/31] msf2: Add Smartfusion2 SPI controller, Peter Maydell, 2017/09/21
- [Qemu-devel] [PULL 19/31] nvic: Support banked exceptions in acknowledge and complete, Peter Maydell, 2017/09/21
- [Qemu-devel] [PULL 23/31] hw/timer/omap_synctimer.c: Don't use old_mmio, Peter Maydell, 2017/09/21
- [Qemu-devel] [PULL 28/31] msf2: Microsemi Smartfusion2 System Register block, Peter Maydell, 2017/09/21
- [Qemu-devel] [PULL 22/31] hw/gpio/omap_gpio.c: Don't use old_mmio, Peter Maydell, 2017/09/21
- [Qemu-devel] [PULL 02/31] nvic: Add banked exception states, Peter Maydell, 2017/09/21
- [Qemu-devel] [PULL 27/31] msf2: Add Smartfusion2 System timer, Peter Maydell, 2017/09/21
- [Qemu-devel] [PULL 03/31] nvic: Add cached vectpending_is_s_banked state,
Peter Maydell <=
- [Qemu-devel] [PULL 31/31] msf2: Add Emcraft's Smartfusion2 SOM kit, Peter Maydell, 2017/09/21
- [Qemu-devel] [PULL 30/31] msf2: Add Smartfusion2 SoC, Peter Maydell, 2017/09/21
- [Qemu-devel] [PULL 20/31] target/arm: Remove out of date ARM ARM section references in A64 decoder, Peter Maydell, 2017/09/21
- Re: [Qemu-devel] [PULL 00/31] target-arm queue, Peter Maydell, 2017/09/21