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Re: [Qemu-devel] [PATCH v3 6/6] mips: replace cpu_mips_init() with cpu_g
From: |
Igor Mammedov |
Subject: |
Re: [Qemu-devel] [PATCH v3 6/6] mips: replace cpu_mips_init() with cpu_generic_init() |
Date: |
Wed, 20 Sep 2017 11:21:16 +0200 |
On Sun, 17 Sep 2017 20:20:10 -0300
Philippe Mathieu-Daudé <address@hidden> wrote:
Hi Philippe,
since series were sitting unmerged on list for a long time
path won't apply due to context changes on top of
[PATCH v2 0/5] generalize parsing of cpu_model (x86/arm)
for which Eduardo posted pull req yesterday.
Could you rebase this patch on top of pull req
(it's only this one patch, the rest applies fine)
> From: Igor Mammedov <address@hidden>
>
> now cpu_mips_init() reimplements subset of cpu_generic_init()
> tasks, so just drop it and use cpu_generic_init() directly.
>
> Signed-off-by: Igor Mammedov <address@hidden>
> Reviewed-by: Hervé Poussineau <address@hidden>
> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
> [PMD: use internal.h instead of cpu.h]
> Tested-by: James Hogan <address@hidden>
> Reviewed-by: Eduardo Habkost <address@hidden>
> ---
> target/mips/cpu.h | 3 +--
> hw/mips/cps.c | 2 +-
> hw/mips/mips_fulong2e.c | 2 +-
> hw/mips/mips_jazz.c | 2 +-
> hw/mips/mips_malta.c | 2 +-
> hw/mips/mips_mipssim.c | 2 +-
> hw/mips/mips_r4k.c | 2 +-
> target/mips/translate.c | 17 -----------------
> 8 files changed, 7 insertions(+), 25 deletions(-)
>
> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> index 2f81e0f950..66265e4eb6 100644
> --- a/target/mips/cpu.h
> +++ b/target/mips/cpu.h
> @@ -737,10 +737,9 @@ enum {
> */
> #define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0
>
> -MIPSCPU *cpu_mips_init(const char *cpu_model);
> int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
>
> -#define cpu_init(cpu_model) CPU(cpu_mips_init(cpu_model))
> +#define cpu_init(cpu_model) cpu_generic_init(TYPE_MIPS_CPU, cpu_model)
> bool cpu_supports_cps_smp(const char *cpu_model);
> bool cpu_supports_isa(const char *cpu_model, unsigned int isa);
> void cpu_set_exception_base(int vp_index, target_ulong address);
> diff --git a/hw/mips/cps.c b/hw/mips/cps.c
> index 4ef337d5c4..708899cf92 100644
> --- a/hw/mips/cps.c
> +++ b/hw/mips/cps.c
> @@ -71,7 +71,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
> bool itu_present = false;
>
> for (i = 0; i < s->num_vp; i++) {
> - cpu = cpu_mips_init(s->cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, s->cpu_model));
> if (cpu == NULL) {
> error_setg(errp, "%s: CPU initialization failed", __func__);
> return;
> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
> index 3532399a13..5d9462ec35 100644
> --- a/hw/mips/mips_fulong2e.c
> +++ b/hw/mips/mips_fulong2e.c
> @@ -280,7 +280,7 @@ static void mips_fulong2e_init(MachineState *machine)
> if (cpu_model == NULL) {
> cpu_model = "Loongson-2E";
> }
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
> index df2262a2a8..c1402de1ce 100644
> --- a/hw/mips/mips_jazz.c
> +++ b/hw/mips/mips_jazz.c
> @@ -151,7 +151,7 @@ static void mips_jazz_init(MachineState *machine,
> if (cpu_model == NULL) {
> cpu_model = "R4000";
> }
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index af678f5784..9ecdc818b1 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -931,7 +931,7 @@ static void create_cpu_without_cps(const char *cpu_model,
> int i;
>
> for (i = 0; i < smp_cpus; i++) {
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
> index 07fc4c2300..1166834f54 100644
> --- a/hw/mips/mips_mipssim.c
> +++ b/hw/mips/mips_mipssim.c
> @@ -163,7 +163,7 @@ mips_mipssim_init(MachineState *machine)
> cpu_model = "24Kf";
> #endif
> }
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
> index 2f5ced7409..de212f5c13 100644
> --- a/hw/mips/mips_r4k.c
> +++ b/hw/mips/mips_r4k.c
> @@ -193,7 +193,7 @@ void mips_r4k_init(MachineState *machine)
> cpu_model = "24Kf";
> #endif
> }
> - cpu = cpu_mips_init(cpu_model);
> + cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
> if (cpu == NULL) {
> fprintf(stderr, "Unable to find CPU definition\n");
> exit(1);
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index f7128bc91d..d16d879df7 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -20523,23 +20523,6 @@ void cpu_mips_realize_env(CPUMIPSState *env)
> mvp_init(env, env->cpu_model);
> }
>
> -MIPSCPU *cpu_mips_init(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - MIPSCPU *cpu;
> -
> - oc = cpu_class_by_name(TYPE_MIPS_CPU, cpu_model);
> - if (oc == NULL) {
> - return NULL;
> - }
> -
> - cpu = MIPS_CPU(object_new(object_class_get_name(oc)));
> -
> - object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
> -
> - return cpu;
> -}
> -
> bool cpu_supports_cps_smp(const char *cpu_model)
> {
> const mips_def_t *def = cpu_mips_find_by_name(cpu_model);
- [Qemu-devel] [PATCH v3 0/6] QOMify MIPS cpu, Philippe Mathieu-Daudé, 2017/09/17
- [Qemu-devel] [PATCH v3 1/6] mips: move hw/mips/cputimer.c to target/mips/, Philippe Mathieu-Daudé, 2017/09/17
- [Qemu-devel] [PATCH v3 3/6] mips: split cpu_mips_realize_env() out of cpu_mips_init(), Philippe Mathieu-Daudé, 2017/09/17
- [Qemu-devel] [PATCH v3 2/6] mips: introduce internal.h and cleanup cpu.h, Philippe Mathieu-Daudé, 2017/09/17
- [Qemu-devel] [PATCH v3 4/6] mips: call cpu_mips_realize_env() from mips_cpu_realizefn(), Philippe Mathieu-Daudé, 2017/09/17
- [Qemu-devel] [PATCH v3 5/6] mips: MIPSCPU model subclasses, Philippe Mathieu-Daudé, 2017/09/17
- [Qemu-devel] [PATCH v3 6/6] mips: replace cpu_mips_init() with cpu_generic_init(), Philippe Mathieu-Daudé, 2017/09/17
- Re: [Qemu-devel] [PATCH v3 6/6] mips: replace cpu_mips_init() with cpu_generic_init(),
Igor Mammedov <=
- Re: [Qemu-devel] [PATCH v3 0/6] QOMify MIPS cpu, no-reply, 2017/09/17