[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 10/18] xlnx-zcu102: Add a machine level secure proper
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 10/18] xlnx-zcu102: Add a machine level secure property |
Date: |
Thu, 14 Sep 2017 18:52:45 +0100 |
From: Alistair Francis <address@hidden>
Add a machine level secure property. This defaults to false and can be
set to true using this machine command line argument:
-machine xlnx-zcu102,secure=on
This follows what the ARM virt machine does.
This property only applies to the ZCU102 machine. The EP108 machine does
not have this property.
Signed-off-by: Alistair Francis <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/xlnx-zcu102.c | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index 5b1f184..bd573c4 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -30,6 +30,8 @@ typedef struct XlnxZCU102 {
XlnxZynqMPState soc;
MemoryRegion ddr_ram;
+
+ bool secure;
} XlnxZCU102;
#define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102")
@@ -42,6 +44,20 @@ typedef struct XlnxZCU102 {
static struct arm_boot_info xlnx_zcu102_binfo;
+static bool zcu102_get_secure(Object *obj, Error **errp)
+{
+ XlnxZCU102 *s = ZCU102_MACHINE(obj);
+
+ return s->secure;
+}
+
+static void zcu102_set_secure(Object *obj, bool value, Error **errp)
+{
+ XlnxZCU102 *s = ZCU102_MACHINE(obj);
+
+ s->secure = value;
+}
+
static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
{
int i;
@@ -69,6 +85,8 @@ static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState
*machine)
object_property_set_link(OBJECT(&s->soc), OBJECT(&s->ddr_ram),
"ddr-ram", &error_abort);
+ object_property_set_bool(OBJECT(&s->soc), s->secure, "secure",
+ &error_fatal);
object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
@@ -134,6 +152,10 @@ static void xlnx_ep108_init(MachineState *machine)
static void xlnx_ep108_machine_instance_init(Object *obj)
{
+ XlnxZCU102 *s = EP108_MACHINE(obj);
+
+ /* EP108, we don't support setting secure */
+ s->secure = false;
}
static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
@@ -169,6 +191,16 @@ static void xlnx_zcu102_init(MachineState *machine)
static void xlnx_zcu102_machine_instance_init(Object *obj)
{
+ XlnxZCU102 *s = ZCU102_MACHINE(obj);
+
+ /* Default to secure mode being disabled */
+ s->secure = false;
+ object_property_add_bool(obj, "secure", zcu102_get_secure,
+ zcu102_set_secure, NULL);
+ object_property_set_description(obj, "secure",
+ "Set on/off to enable/disable the ARM "
+ "Security Extensions (TrustZone)",
+ NULL);
}
static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
--
2.7.4
- [Qemu-devel] [PULL 14/18] target/arm: Avoid an extra temporary for store_exclusive, (continued)
- [Qemu-devel] [PULL 14/18] target/arm: Avoid an extra temporary for store_exclusive, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 08/18] xlnx-ep108: Rename to ZCU102, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 03/18] target/arm: Get PRECISERR and IBUSERR the right way round, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 06/18] target/arm: Add and use defines for EXCRET constants, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 04/18] nvic: Don't apply group priority mask to negative priorities, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 07/18] target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit(), Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 05/18] target/arm: Remove unnecessary '| 0xf0000000' from do_v7m_exception_exit(), Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 02/18] target/arm: Clear exclusive monitor on v7M reset, exception entry/exit, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 11/18] xlnx-zcu102: Add a machine level virtualization property, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 12/18] xlnx-zcu102: Mark the EP108 machine as deprecated, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 10/18] xlnx-zcu102: Add a machine level secure property,
Peter Maydell <=
- [Qemu-devel] [PULL 18/18] mps2-an511: Fix wiring of UART overflow interrupt lines, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 09/18] xlnx-zcu102: Manually create the machines, Peter Maydell, 2017/09/14
- Re: [Qemu-devel] [PULL 00/18] target-arm queue, Peter Maydell, 2017/09/15