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Re: [Qemu-devel] [PATCH] tcg/ppc: disable atomic write check on ppc32


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH] tcg/ppc: disable atomic write check on ppc32
Date: Mon, 11 Sep 2017 22:37:24 +0100

On 11 September 2017 at 21:49, Philippe Mathieu-Daudé <address@hidden> wrote:
> this fixes building for ppc64 on ppc32 (changed in 5964fca8a12c):
>
>   qemu/tcg/ppc/tcg-target.inc.c: In function 'tb_target_set_jmp_target':
>   qemu/include/qemu/compiler.h:86:30: error: static assertion failed: "not 
> expecting: sizeof(*(uint64_t *)jmp_addr) > ATOMIC_REG_SIZE"
>        QEMU_BUILD_BUG_ON(sizeof(*ptr) > ATOMIC_REG_SIZE); \
>        ^
>   qemu/tcg/ppc/tcg-target.inc.c:1377:9: note: in expansion of macro 
> 'atomic_set'
>            atomic_set((uint64_t *)jmp_addr, pair);
>            ^
>
> Suggested-by: Richard Henderson <address@hidden>
> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
> ---
> This fixes Shippable builds, see:
> https://app.shippable.com/github/qemu/qemu/runs/434/10/console
>
>  tcg/ppc/tcg-target.inc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
> index 21d764c102..0417901289 100644
> --- a/tcg/ppc/tcg-target.inc.c
> +++ b/tcg/ppc/tcg-target.inc.c
> @@ -1374,7 +1374,7 @@ void tb_target_set_jmp_target(uintptr_t tc_ptr, 
> uintptr_t jmp_addr,
>          pair = (uint64_t)i2 << 32 | i1;
>  #endif
>
> -        atomic_set((uint64_t *)jmp_addr, pair);
> +        atomic_set__nocheck((uint64_t *)jmp_addr, pair);
>          flush_icache_range(jmp_addr, jmp_addr + 8);
>      } else {
>          intptr_t diff = addr - jmp_addr;

Can you explain why this is the right thing? On the
face of it it looks correct to insist that we don't
try to do an atomic set of something that's bigger
than the host can actually handle...

thanks
-- PMM



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