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[Qemu-devel] [PATCH 3/7] trace: Add event "guest_inst_info_before"
From: |
Lluís Vilanova |
Subject: |
[Qemu-devel] [PATCH 3/7] trace: Add event "guest_inst_info_before" |
Date: |
Sun, 10 Sep 2017 19:23:13 +0300 |
User-agent: |
StGit/0.18 |
Signed-off-by: Lluís Vilanova <address@hidden>
---
accel/tcg/translator.c | 18 ++++++++++++++++++
trace-events | 9 +++++++++
2 files changed, 27 insertions(+)
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
index 287d27b4f7..6598931171 100644
--- a/accel/tcg/translator.c
+++ b/accel/tcg/translator.c
@@ -70,6 +70,8 @@ void translator_loop(const TranslatorOps *ops,
DisasContextBase *db,
while (true) {
target_ulong pc_insn = db->pc_next;
+ TCGv_i32 insn_size_tcg = 0;
+ int insn_size_opcode_idx;
db->num_insns++;
ops->insn_start(db, cpu);
@@ -99,6 +101,16 @@ void translator_loop(const TranslatorOps *ops,
DisasContextBase *db,
trace_guest_bbl_before_tcg(cpu, tcg_ctx.tcg_env, db->pc_first);
}
trace_guest_inst_before_tcg(cpu, tcg_ctx.tcg_env, pc_insn);
+ if (TRACE_GUEST_INST_INFO_BEFORE_EXEC_ENABLED) {
+ insn_size_tcg = tcg_temp_new_i32();
+ insn_size_opcode_idx = tcg_op_buf_count();
+ tcg_gen_movi_i32(insn_size_tcg, 0xdeadbeef);
+
+ trace_guest_inst_info_before_tcg(
+ cpu, tcg_ctx.tcg_env, pc_insn, insn_size_tcg);
+
+ tcg_temp_free_i32(insn_size_tcg);
+ }
/* Disassemble one instruction. The translate_insn hook should
update db->pc_next and db->is_jmp to indicate what should be
@@ -113,6 +125,12 @@ void translator_loop(const TranslatorOps *ops,
DisasContextBase *db,
ops->translate_insn(db, cpu);
}
+ /* Tracing after (patched values) */
+ if (TRACE_GUEST_INST_INFO_BEFORE_EXEC_ENABLED) {
+ unsigned int insn_size = db->pc_next - pc_insn;
+ tcg_set_insn_param(insn_size_opcode_idx, 1, insn_size);
+ }
+
/* Stop translation if translate_insn so indicated. */
if (db->is_jmp != DISAS_NEXT) {
break;
diff --git a/trace-events b/trace-events
index 46457c6158..4e61697297 100644
--- a/trace-events
+++ b/trace-events
@@ -107,6 +107,15 @@ vcpu tcg guest_bbl_before(uint64_t vaddr)
"vaddr=0x%016"PRIx64, "vaddr=0x%016"PR
# Targets: TCG(all)
vcpu tcg guest_inst_before(uint64_t vaddr) "vaddr=0x%016"PRIx64,
"vaddr=0x%016"PRIx64
+# @vaddr: Instruction's virtual address
+# @size: Instruction's size in bytes
+#
+# Same as 'guest_inst_before', with additional information.
+#
+# Mode: user, softmmu
+# Targets: TCG(all)
+disable vcpu tcg guest_inst_info_before(uint64_t vaddr, TCGv_i32 size)
"vaddr=0x%016"PRIx64, "vaddr=0x%016"PRIx64" size=%d"
+
# @vaddr: Access' virtual address.
# @info : Access' information (see below).
#
- [Qemu-devel] [PATCH 0/7] trace: Add guest code events, Lluís Vilanova, 2017/09/10
- [Qemu-devel] [PATCH 4/7] tcg: Add support for "inlining" regions of code, Lluís Vilanova, 2017/09/10
- Re: [Qemu-devel] [PATCH 4/7] tcg: Add support for "inlining" regions of code, Richard Henderson, 2017/09/13
- Re: [Qemu-devel] [PATCH 4/7] tcg: Add support for "inlining" regions of code, Lluís Vilanova, 2017/09/14
- Re: [Qemu-devel] [PATCH 4/7] tcg: Add support for "inlining" regions of code, Richard Henderson, 2017/09/14
- Re: [Qemu-devel] [PATCH 4/7] tcg: Add support for "inlining" regions of code, Lluís Vilanova, 2017/09/15
- Re: [Qemu-devel] [PATCH 4/7] tcg: Add support for "inlining" regions of code, Lluís Vilanova, 2017/09/26
- Re: [Qemu-devel] [PATCH 4/7] tcg: Add support for "inlining" regions of code, Richard Henderson, 2017/09/26