[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [RFC PATCH 4/9] helper-head: add support for vec type
From: |
Alex Bennée |
Subject: |
[Qemu-devel] [RFC PATCH 4/9] helper-head: add support for vec type |
Date: |
Thu, 17 Aug 2017 19:03:59 +0100 |
---
include/exec/helper-head.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
index 1cfc43b9ff..3fb4c3fc39 100644
--- a/include/exec/helper-head.h
+++ b/include/exec/helper-head.h
@@ -23,6 +23,7 @@
#define GET_TCGV_i32 GET_TCGV_I32
#define GET_TCGV_i64 GET_TCGV_I64
#define GET_TCGV_ptr GET_TCGV_PTR
+#define GET_TCGV_vec GET_TCGV_VEC
/* Some types that make sense in C, but not for TCG. */
#define dh_alias_i32 i32
@@ -33,6 +34,7 @@
#define dh_alias_f32 i32
#define dh_alias_f64 i64
#define dh_alias_ptr ptr
+#define dh_alias_vec vec
#define dh_alias_void void
#define dh_alias_noreturn noreturn
#define dh_alias(t) glue(dh_alias_, t)
@@ -45,6 +47,7 @@
#define dh_ctype_f32 float32
#define dh_ctype_f64 float64
#define dh_ctype_ptr void *
+#define dh_ctype_vec void *
#define dh_ctype_void void
#define dh_ctype_noreturn void QEMU_NORETURN
#define dh_ctype(t) dh_ctype_##t
@@ -90,6 +93,7 @@
#define dh_is_64bit_i32 0
#define dh_is_64bit_i64 1
#define dh_is_64bit_ptr (sizeof(void *) == 8)
+#define dh_is_64bit_vec (sizeof(void *) == 8)
#define dh_is_64bit(t) glue(dh_is_64bit_, dh_alias(t))
#define dh_is_signed_void 0
@@ -106,6 +110,7 @@
extension instructions that may be required, e.g. ia64's addp4. But
for now we don't support any 64-bit targets with 32-bit pointers. */
#define dh_is_signed_ptr 0
+#define dh_is_signed_vec dh_is_signed_ptr
#define dh_is_signed_env dh_is_signed_ptr
#define dh_is_signed(t) dh_is_signed_##t
--
2.13.0
- [Qemu-devel] [RFC PATCH 0/9] TCG Vector types and example conversion, Alex Bennée, 2017/08/17
- [Qemu-devel] [RFC PATCH 2/9] tcg: introduce the concepts of a TCGv_vec register type, Alex Bennée, 2017/08/17
- [Qemu-devel] [RFC PATCH 1/9] tcg/README: listify the TCG types., Alex Bennée, 2017/08/17
- [Qemu-devel] [RFC PATCH 4/9] helper-head: add support for vec type,
Alex Bennée <=
- [Qemu-devel] [RFC PATCH 8/9] target/arm/helpers: introduce ADVSIMD flags, Alex Bennée, 2017/08/17
- [Qemu-devel] [RFC PATCH 7/9] target/arm/translate-a64: register global vectors, Alex Bennée, 2017/08/17
- [Qemu-devel] [RFC PATCH 5/9] arm/cpu.h: align VFP registers, Alex Bennée, 2017/08/17
- [Qemu-devel] [RFC PATCH 6/9] target/arm/translate-a64: regnames -> x_regnames, Alex Bennée, 2017/08/17
- [Qemu-devel] [RFC PATCH 3/9] tcg: generate ptrs to vector registers, Alex Bennée, 2017/08/17
- [Qemu-devel] [RFC PATCH 9/9] target/arm/translate-a64: vectorise smull vD.4s, vN.[48]s, vM.h[], Alex Bennée, 2017/08/17