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Re: [Qemu-devel] [PULL 0/7] target-arm queue
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PULL 0/7] target-arm queue |
Date: |
Mon, 31 Jul 2017 16:40:10 +0100 |
On 31 July 2017 at 13:22, Peter Maydell <address@hidden> wrote:
> ARM queue for 2.10: all M profile bugfixes...
>
> thanks
> -- PMM
>
> The following changes since commit 25dd0e77898c3e10796d4cbeb35e8af5ba6ce975:
>
> Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into
> staging (2017-07-31 11:27:43 +0100)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20170731
>
> for you to fetch changes up to 89cbc3778a3d61761e2231e740269218c9a8a41d:
>
> hw/mps2_scc: fix incorrect properties (2017-07-31 13:11:56 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * fix broken properties on MPS2 SCC device
> * fix MPU trace handling of write vs exec
> * fix MPU M profile bugs:
> - not handling system space or PPB region correctly
> - not resetting state
> - not migrating MPU_RNR
>
> ----------------------------------------------------------------
> Peter Maydell (6):
> target/arm: Correct MPU trace handling of write vs execute
> target/arm: Don't do MPU lookups for addresses in M profile PPB region
> target/arm: Don't allow guest to make System space executable for M
> profile
> target/arm: Rename cp15.c6_rgnr to pmsav7.rnr
> target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs
> get reset
> target/arm: Migrate MPU_RNR register state for M profile cores
>
> Philippe Mathieu-Daudé (1):
> hw/mps2_scc: fix incorrect properties
Applied, thanks.
-- PMM
- [Qemu-devel] [PULL 0/7] target-arm queue, Peter Maydell, 2017/07/31
- [Qemu-devel] [PULL 7/7] hw/mps2_scc: fix incorrect properties, Peter Maydell, 2017/07/31
- [Qemu-devel] [PULL 6/7] target/arm: Migrate MPU_RNR register state for M profile cores, Peter Maydell, 2017/07/31
- [Qemu-devel] [PULL 5/7] target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get reset, Peter Maydell, 2017/07/31
- [Qemu-devel] [PULL 1/7] target/arm: Correct MPU trace handling of write vs execute, Peter Maydell, 2017/07/31
- [Qemu-devel] [PULL 4/7] target/arm: Rename cp15.c6_rgnr to pmsav7.rnr, Peter Maydell, 2017/07/31
- [Qemu-devel] [PULL 2/7] target/arm: Don't do MPU lookups for addresses in M profile PPB region, Peter Maydell, 2017/07/31
- [Qemu-devel] [PULL 3/7] target/arm: Don't allow guest to make System space executable for M profile, Peter Maydell, 2017/07/31
- Re: [Qemu-devel] [PULL 0/7] target-arm queue,
Peter Maydell <=