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[Qemu-devel] [RFC PATCH for 2.11 18/23] fpu/softfloat2a: implement float
From: |
Alex Bennée |
Subject: |
[Qemu-devel] [RFC PATCH for 2.11 18/23] fpu/softfloat2a: implement float16_squash_input_denormal |
Date: |
Thu, 20 Jul 2017 16:04:21 +0100 |
This will be required when expanding the MINMAX() macro for 16
bit/half-precision operations.
Signed-off-by: Alex Bennée <address@hidden>
---
fpu/softfloat2a/softfloat.c | 15 +++++++++++++++
include/fpu/softfloat2a/softfloat.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/fpu/softfloat2a/softfloat.c b/fpu/softfloat2a/softfloat.c
index 59b9bc9e24..4f1abbe08f 100644
--- a/fpu/softfloat2a/softfloat.c
+++ b/fpu/softfloat2a/softfloat.c
@@ -3488,6 +3488,21 @@ static float16 roundAndPackFloat16(flag zSign, int zExp,
return packFloat16(zSign, zExp, zSig >> 13);
}
+/*----------------------------------------------------------------------------
+| If `a' is denormal and we are in flush-to-zero mode then set the
+| input-denormal exception and return zero. Otherwise just return the value.
+*----------------------------------------------------------------------------*/
+float16 float16_squash_input_denormal(float16 a, float_status *status)
+{
+ if (status->flush_inputs_to_zero) {
+ if (extractFloat16Exp(a) == 0 && extractFloat16Frac(a) != 0) {
+ float_raise(float_flag_input_denormal, status);
+ return make_float16(float16_val(a) & 0x8000);
+ }
+ }
+ return a;
+}
+
static void normalizeFloat16Subnormal(uint32_t aSig, int *zExpPtr,
uint32_t *zSigPtr)
{
diff --git a/include/fpu/softfloat2a/softfloat.h
b/include/fpu/softfloat2a/softfloat.h
index d9689eca2a..a274dc7419 100644
--- a/include/fpu/softfloat2a/softfloat.h
+++ b/include/fpu/softfloat2a/softfloat.h
@@ -282,6 +282,7 @@ void float_raise(uint8_t flags, float_status *status);
| If `a' is denormal and we are in flush-to-zero mode then set the
| input-denormal exception and return zero. Otherwise just return the value.
*----------------------------------------------------------------------------*/
+float16 float16_squash_input_denormal(float16 a, float_status *status);
float32 float32_squash_input_denormal(float32 a, float_status *status);
float64 float64_squash_input_denormal(float64 a, float_status *status);
--
2.13.0
- [Qemu-devel] [RFC PATCH for 2.11 17/23] fpu/softfloat2a: implement propagateFloat16NaN, (continued)
- [Qemu-devel] [RFC PATCH for 2.11 17/23] fpu/softfloat2a: implement propagateFloat16NaN, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 12/23] target/arm/translate-a64.c: add FP16 FAGCT to AdvSIMD 3 Same, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 04/23] softfloat3c: fixup include paths, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 15/23] target/arm/translate-a64.c: AdvSIMD scalar 2 register misc decode, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 22/23] fpu/softfloat2a: improve comments on ARM NaN propagation, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 23/23] target/arm: implement half-precision F(MIN|MAX)(V|NMV), Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 18/23] fpu/softfloat2a: implement float16_squash_input_denormal,
Alex Bennée <=
- [Qemu-devel] [RFC PATCH for 2.11 14/23] target/arm/translate-a64.c: add ARMv8.2 fadd scalar half-precision, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 19/23] fpu/softfloat2a: implement float16_abs helper, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 21/23] fpu/softfloat2a: propagate signalling NaNs in MINMAX, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 16/23] include/exec/helper-head.h: support f16 in helper calls, Alex Bennée, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 20/23] fpu/softfloat2a: add half-precision expansions for MINMAX fns, Alex Bennée, 2017/07/20
- Re: [Qemu-devel] [RFC PATCH for 2.11 00/23] Implementing FP16 for ARMv8.2 using SoftFloat2a and 3c, Peter Maydell, 2017/07/20
- [Qemu-devel] [RFC PATCH for 2.11 02/23] fpu: import SoftFloat3c, Alex Bennée, 2017/07/20