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[Qemu-devel] [PATCH 2/5] target/s390x: Enforce instruction features
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 2/5] target/s390x: Enforce instruction features |
Date: |
Wed, 14 Jun 2017 22:53:53 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/s390x/translate.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index af18ffb..48cee25 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -55,6 +55,7 @@ typedef struct DisasFields DisasFields;
struct DisasContext {
struct TranslationBlock *tb;
+ const unsigned long *features;
const DisasInsn *insn;
DisasFields *fields;
uint64_t ex_value;
@@ -5600,6 +5601,12 @@ static ExitStatus translate_one(CPUS390XState *env,
DisasContext *s)
}
#endif
+ /* Check for insn feature enabled. */
+ if (!test_bit(insn->fac, s->features)) {
+ gen_program_exception(s, PGM_OPERATION);
+ return EXIT_NORETURN;
+ }
+
/* Check for insn specification exceptions. */
if (insn->spec) {
int spec = insn->spec, excp = 0, r;
@@ -5726,6 +5733,7 @@ void gen_intermediate_code(CPUS390XState *env, struct
TranslationBlock *tb)
}
dc.tb = tb;
+ dc.features = cpu->model->features;
dc.pc = pc_start;
dc.cc_op = CC_OP_DYNAMIC;
dc.ex_value = tb->cs_base;
--
2.9.4
[Qemu-devel] [PATCH 1/5] target/s390x: Map existing FAC_* names to S390_FEAT_* names, Richard Henderson, 2017/06/15
[Qemu-devel] [PATCH 3/5] target/s390x: change PSW_SHIFT_KEY, Richard Henderson, 2017/06/15
[Qemu-devel] [PATCH 5/5] target/s390x: mark CSST, CSST2, FPSEH facilities as available, Richard Henderson, 2017/06/15