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Re: [Qemu-devel] [PATCH 1/3] target/s390x: mask the SIGP order_code usin


From: Thomas Huth
Subject: Re: [Qemu-devel] [PATCH 1/3] target/s390x: mask the SIGP order_code using SIGP_ORDER_MASK
Date: Tue, 9 May 2017 11:21:22 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0

On 09.05.2017 10:27, Aurelien Jarno wrote:
> For that move the definition from kvm.c to cpu.h
> 
> Signed-off-by: Aurelien Jarno <address@hidden>
> ---
>  target/s390x/cpu.h         | 3 +++
>  target/s390x/kvm.c         | 2 --
>  target/s390x/misc_helper.c | 3 +--
>  3 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
> index df823280a5..2471db920d 100644
> --- a/target/s390x/cpu.h
> +++ b/target/s390x/cpu.h
> @@ -1081,6 +1081,9 @@ struct sysib_322 {
>  #define SIGP_MODE_Z_ARCH_TRANS_ALL_PSW 1
>  #define SIGP_MODE_Z_ARCH_TRANS_CUR_PSW 2
>  
> +/* SIGP order code mask corresponding to bit positions 56-63 */
> +#define SIGP_ORDER_MASK 0x000000ff
> +
>  void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr);
>  int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t 
> asc,
>                    target_ulong *raddr, int *flags, bool exc);
> diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c
> index 1a249d8359..fb105429be 100644
> --- a/target/s390x/kvm.c
> +++ b/target/s390x/kvm.c
> @@ -1764,8 +1764,6 @@ static int sigp_set_architecture(S390CPU *cpu, uint32_t 
> param,
>      return SIGP_CC_ORDER_CODE_ACCEPTED;
>  }
>  
> -#define SIGP_ORDER_MASK 0x000000ff
> -
>  static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1)
>  {
>      CPUS390XState *env = &cpu->env;
> diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c
> index 53cb3b8ac6..395f38dea5 100644
> --- a/target/s390x/misc_helper.c
> +++ b/target/s390x/misc_helper.c
> @@ -521,8 +521,7 @@ uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t 
> order_code, uint32_t r1,
>  
>      qemu_mutex_lock_iothread();
>  
> -    /* sigp contains the order code in bit positions 56-63, mask it here. */
> -    switch (order_code & 0xff) {
> +    switch (order_code & SIGP_ORDER_MASK) {
>      case SIGP_SET_ARCH:
>          cc = SIGP_CC_ORDER_CODE_ACCEPTED;
>          /* switch arch */

Reviewed-by: Thomas Huth <address@hidden>




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