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Re: [Qemu-devel] [PULL 00/11] Fixes and features for OpenRISC
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Subject: |
Re: [Qemu-devel] [PULL 00/11] Fixes and features for OpenRISC |
Date: |
Sun, 30 Apr 2017 17:06:44 -0700 (PDT) |
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: address@hidden
Type: series
Subject: [Qemu-devel] [PULL 00/11] Fixes and features for OpenRISC
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames True
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
7989364 target/openrisc: Support non-busy idle state using PMR SPR
2b4b86b target/openrisc: Remove duplicate features property
fe20698 target/openrisc: Implement full vmstate serialization
d647ed5 migration: Add VMSTATE_STRUCT_2DARRAY()
b06a1f7 target/openrisc: implement shadow registers
5ac9dfa migration: Add VMSTATE_UINTTL_2DARRAY()
5fd970d target/openrisc: add numcores and coreid support
6a012fb target/openrisc: Fixes for memory debugging
da141c5 target/openrisc: Implement EPH bit
8d983cb target/openrisc: Implement EVBAR register
9088518 MAINTAINERS: Add myself as openrisc maintainer
=== OUTPUT BEGIN ===
Checking PATCH 1/11: MAINTAINERS: Add myself as openrisc maintainer...
Checking PATCH 2/11: target/openrisc: Implement EVBAR register...
Checking PATCH 3/11: target/openrisc: Implement EPH bit...
Checking PATCH 4/11: target/openrisc: Fixes for memory debugging...
WARNING: line over 80 characters
#45: FILE: target/openrisc/mmu.c:232:
+ miss = cpu_openrisc_get_phys_addr(cpu, &phys_addr, &prot, addr,
MMU_INST_FETCH);
total: 0 errors, 1 warnings, 38 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 5/11: target/openrisc: add numcores and coreid support...
Checking PATCH 6/11: migration: Add VMSTATE_UINTTL_2DARRAY()...
Checking PATCH 7/11: target/openrisc: implement shadow registers...
WARNING: line over 80 characters
#135: FILE: linux-user/signal.c:4492:
+ __put_user(sas_ss_flags(cpu_get_gpr(env, 1)),
&frame->uc.tuc_stack.ss_flags);
total: 0 errors, 1 warnings, 230 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 8/11: migration: Add VMSTATE_STRUCT_2DARRAY()...
ERROR: line over 90 characters
#20: FILE: include/migration/vmstate.h:503:
+#define VMSTATE_STRUCT_2DARRAY_TEST(_field, _state, _n1, _n2, _test, _version,
_vmsd, _type) { \
ERROR: spaces required around that '|' (ctx:VxV)
#27: FILE: include/migration/vmstate.h:510:
+ .flags = VMS_STRUCT|VMS_ARRAY, \
^
WARNING: line over 80 characters
#38: FILE: include/migration/vmstate.h:761:
+#define VMSTATE_STRUCT_2DARRAY(_field, _state, _n1, _n2, _version, _vmsd,
_type) \
total: 2 errors, 1 warnings, 27 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 9/11: target/openrisc: Implement full vmstate serialization...
Checking PATCH 10/11: target/openrisc: Remove duplicate features property...
Checking PATCH 11/11: target/openrisc: Support non-busy idle state using PMR
SPR...
=== OUTPUT END ===
Test command exited with code: 1
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to address@hidden
- [Qemu-devel] [PULL 02/11] target/openrisc: Implement EVBAR register, (continued)
- [Qemu-devel] [PULL 02/11] target/openrisc: Implement EVBAR register, Stafford Horne, 2017/04/30
- [Qemu-devel] [PULL 03/11] target/openrisc: Implement EPH bit, Stafford Horne, 2017/04/30
- [Qemu-devel] [PULL 04/11] target/openrisc: Fixes for memory debugging, Stafford Horne, 2017/04/30
- [Qemu-devel] [PULL 05/11] target/openrisc: add numcores and coreid support, Stafford Horne, 2017/04/30
- [Qemu-devel] [PULL 06/11] migration: Add VMSTATE_UINTTL_2DARRAY(), Stafford Horne, 2017/04/30
- [Qemu-devel] [PULL 08/11] migration: Add VMSTATE_STRUCT_2DARRAY(), Stafford Horne, 2017/04/30
- [Qemu-devel] [PULL 07/11] target/openrisc: implement shadow registers, Stafford Horne, 2017/04/30
- [Qemu-devel] [PULL 09/11] target/openrisc: Implement full vmstate serialization, Stafford Horne, 2017/04/30
- [Qemu-devel] [PULL 10/11] target/openrisc: Remove duplicate features property, Stafford Horne, 2017/04/30
- [Qemu-devel] [PULL 11/11] target/openrisc: Support non-busy idle state using PMR SPR, Stafford Horne, 2017/04/30
- Re: [Qemu-devel] [PULL 00/11] Fixes and features for OpenRISC,
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