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[Qemu-devel] [PULL for-2.9 0/4] target-arm queue
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL for-2.9 0/4] target-arm queue |
Date: |
Mon, 20 Mar 2017 12:54:32 +0000 |
Small target-arm queue for 2.9: just the patches
which fix bugs in our MRS/MSR decoding for M profile,
including a fix for a regression introduced in commit
58117c9bb429cd.
thanks
-- PMM
The following changes since commit 00e7c07b06d004cf54b19724f82afde8a7a37f37:
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20170320' into
staging (2017-03-20 10:51:30 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20170320
for you to fetch changes up to b28b3377d7e9ba35611d454d5a63ef50cab1f8c5:
arm: Fix APSR writes via M profile MSR (2017-03-20 12:41:44 +0000)
----------------------------------------------------------------
target-arm queue:
* fix MSR/MRS decoding for M profile CPUs
----------------------------------------------------------------
Peter Maydell (4):
arm: HVC and SMC encodings don't exist for M profile
arm: Don't decode MRS(banked) or MSR(banked) for M profile
arm: Enforce should-be-1 bits in MRS decoding
arm: Fix APSR writes via M profile MSR
target/arm/helper.c | 26 ++++++++++++++++++++++----
target/arm/translate.c | 26 +++++++++++++++++++++++---
2 files changed, 45 insertions(+), 7 deletions(-)
- [Qemu-devel] [PULL for-2.9 0/4] target-arm queue,
Peter Maydell <=
- [Qemu-devel] [PULL 4/4] arm: Fix APSR writes via M profile MSR, Peter Maydell, 2017/03/20
- [Qemu-devel] [PULL 2/4] arm: Don't decode MRS(banked) or MSR(banked) for M profile, Peter Maydell, 2017/03/20
- [Qemu-devel] [PULL 1/4] arm: HVC and SMC encodings don't exist for M profile, Peter Maydell, 2017/03/20
- [Qemu-devel] [PULL 3/4] arm: Enforce should-be-1 bits in MRS decoding, Peter Maydell, 2017/03/20
- Re: [Qemu-devel] [PULL for-2.9 0/4] target-arm queue, Peter Maydell, 2017/03/20