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[Qemu-devel] [PULL 01/11] vl/cpus: be smarter with icount and MTTCG
From: |
Alex Bennée |
Subject: |
[Qemu-devel] [PULL 01/11] vl/cpus: be smarter with icount and MTTCG |
Date: |
Thu, 9 Mar 2017 11:17:04 +0000 |
The sense of the test was inverted. Make it simple, if icount is
enabled then we disabled MTTCG by default. If the user tries to force
MTTCG upon us then we tell them "no".
Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
cpus.c | 7 +++----
vl.c | 7 ++-----
2 files changed, 5 insertions(+), 9 deletions(-)
diff --git a/cpus.c b/cpus.c
index c857ad2957..6a817fec13 100644
--- a/cpus.c
+++ b/cpus.c
@@ -181,10 +181,7 @@ static bool check_tcg_memory_orders_compatible(void)
static bool default_mttcg_enabled(void)
{
- QemuOpts *icount_opts = qemu_find_opts_singleton("icount");
- const char *rr = qemu_opt_get(icount_opts, "rr");
-
- if (rr || TCG_OVERSIZED_GUEST) {
+ if (use_icount || TCG_OVERSIZED_GUEST) {
return false;
} else {
#ifdef TARGET_SUPPORTS_MTTCG
@@ -202,6 +199,8 @@ void qemu_tcg_configure(QemuOpts *opts, Error **errp)
if (strcmp(t, "multi") == 0) {
if (TCG_OVERSIZED_GUEST) {
error_setg(errp, "No MTTCG when guest word size > hosts");
+ } else if (use_icount) {
+ error_setg(errp, "No MTTCG when icount is enabled");
} else {
if (!check_tcg_memory_orders_compatible()) {
error_report("Guest expects a stronger memory ordering "
diff --git a/vl.c b/vl.c
index 7f1644a2be..1a95500ac7 100644
--- a/vl.c
+++ b/vl.c
@@ -4055,8 +4055,6 @@ int main(int argc, char **argv, char **envp)
replay_configure(icount_opts);
- qemu_tcg_configure(accel_opts, &error_fatal);
-
machine_class = select_machine();
set_memory_options(&ram_slots, &maxram_size, machine_class);
@@ -4423,14 +4421,13 @@ int main(int argc, char **argv, char **envp)
if (!tcg_enabled()) {
error_report("-icount is not allowed with hardware
virtualization");
exit(1);
- } else if (qemu_tcg_mttcg_enabled()) {
- error_report("-icount does not currently work with MTTCG");
- exit(1);
}
configure_icount(icount_opts, &error_abort);
qemu_opts_del(icount_opts);
}
+ qemu_tcg_configure(accel_opts, &error_fatal);
+
if (default_net) {
QemuOptsList *net = qemu_find_opts("net");
qemu_opts_set(net, NULL, "type", "nic", &error_abort);
--
2.11.0
- [Qemu-devel] [PULL 00/11] MTTCG Fix-ups for 2.9, Alex Bennée, 2017/03/09
- [Qemu-devel] [PULL 02/11] target/i386/cpu.h: declare TCG_GUEST_DEFAULT_MO, Alex Bennée, 2017/03/09
- [Qemu-devel] [PULL 01/11] vl/cpus: be smarter with icount and MTTCG,
Alex Bennée <=
- [Qemu-devel] [PULL 03/11] cpus.c: add additional error_report when !TARGET_SUPPORT_MTTCG, Alex Bennée, 2017/03/09
- [Qemu-devel] [PULL 04/11] sparc/sparc64: grab BQL before calling cpu_check_irqs, Alex Bennée, 2017/03/09
- [Qemu-devel] [PULL 07/11] translate-all: exit cpu_restore_state early if translating, Alex Bennée, 2017/03/09
- [Qemu-devel] [PULL 05/11] s390x/misc_helper.c: wrap IO instructions in BQL, Alex Bennée, 2017/03/09
- [Qemu-devel] [PULL 06/11] target/xtensa: hold BQL for interrupt processing, Alex Bennée, 2017/03/09
- [Qemu-devel] [PULL 10/11] target/arm/helper: make it clear the EC field is also in hex, Alex Bennée, 2017/03/09
- [Qemu-devel] [PULL 09/11] target-i386: defer VMEXIT to do_interrupt, Alex Bennée, 2017/03/09
- [Qemu-devel] [PULL 08/11] target/mips: hold BQL for timer interrupts, Alex Bennée, 2017/03/09
- [Qemu-devel] [PULL 11/11] hw/intc/arm_gic: modernise the DPRINTF, Alex Bennée, 2017/03/09
- Re: [Qemu-devel] [PULL 00/11] MTTCG Fix-ups for 2.9, Peter Maydell, 2017/03/13