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[Qemu-devel] [PATCH for-2.10 0/8] ppc/pnv: interrupt controller (POWER8)
From: |
Cédric Le Goater |
Subject: |
[Qemu-devel] [PATCH for-2.10 0/8] ppc/pnv: interrupt controller (POWER8) |
Date: |
Wed, 8 Mar 2017 11:52:43 +0100 |
Hello,
Here is a series adding support for the interrupt controller as found
on a POWER8 system. POWER9 uses a different interrupt controller
called XIVE, still to be worked on.
The initial patches are small extensions to the recently added
XICSFabric framework. The PowerNV machine is then extended to hold the
Interrupt Source Control (ICS) and the Interrupt Control Presenter
objects of the system. After that, we use a memory region to model the
Interrupt Management area which contains the ICPs registers of a
POWER8 PowerNV system.
Last is a PSI (Processor Service Interface) bridge model to handle the
external interrupt, a minimal model for the OCC (on-chip Controller)
and support for the LPC controller on POWER8+ cpus.
To test, grab a kernel and a rootfs image here :
https://openpower.xyz/job/openpower-op-build/distro=ubuntu,target=palmetto/lastSuccessfulBuild/artifact/images/zImage.epapr
https://openpower.xyz/job/openpower-op-build/distro=ubuntu,target=palmetto/lastSuccessfulBuild/artifact/images/rootfs.cpio.xz
The full patchset is available here :
https://github.com/legoater/qemu/commits/powernv-ipmi-2.9
Thanks,
C.
Benjamin Herrenschmidt (3):
ppc/pnv: Add cut down PSI bridge model and hookup external interrupt
ppc/pnv: Add OCC model stub with interrupt support
ppc/pnv: Add support for POWER8+ LPC Controller
Cédric Le Goater (5):
ppc/xics: add a xics_get_cpu_index_by_pir() helper
ppc/xics: add an ics_eoi() handler to XICSFabric
ppc/pnv: create the ICP and ICS objects under the machine
ppc/pnv: add memory regions for the ICP registers
ppc/pnv: map the ICP memory regions
hw/intc/xics.c | 20 +-
hw/ppc/Makefile.objs | 2 +-
hw/ppc/pnv.c | 224 ++++++++++++++++-
hw/ppc/pnv_core.c | 158 +++++++++++-
hw/ppc/pnv_lpc.c | 47 +++-
hw/ppc/pnv_occ.c | 136 +++++++++++
hw/ppc/pnv_psi.c | 583 +++++++++++++++++++++++++++++++++++++++++++++
hw/ppc/ppc.c | 16 ++
hw/ppc/spapr.c | 11 +
include/hw/ppc/pnv.h | 34 +++
include/hw/ppc/pnv_core.h | 1 +
include/hw/ppc/pnv_lpc.h | 9 +
include/hw/ppc/pnv_occ.h | 38 +++
include/hw/ppc/pnv_psi.h | 61 +++++
include/hw/ppc/pnv_xscom.h | 6 +
include/hw/ppc/xics.h | 7 +
target/ppc/cpu.h | 10 +
17 files changed, 1343 insertions(+), 20 deletions(-)
create mode 100644 hw/ppc/pnv_occ.c
create mode 100644 hw/ppc/pnv_psi.c
create mode 100644 include/hw/ppc/pnv_occ.h
create mode 100644 include/hw/ppc/pnv_psi.h
--
2.7.4
- [Qemu-devel] [PATCH for-2.10 0/8] ppc/pnv: interrupt controller (POWER8),
Cédric Le Goater <=
[Qemu-devel] [PATCH for-2.10 2/8] ppc/xics: add an ics_eoi() handler to XICSFabric, Cédric Le Goater, 2017/03/08
[Qemu-devel] [PATCH for-2.10 4/8] ppc/pnv: add memory regions for the ICP registers, Cédric Le Goater, 2017/03/08