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From: | Philippe Mathieu-Daudé |
Subject: | Re: [Qemu-devel] [Qemu-arm] [PATCH v3 10/11] target/arm/helper: make it clear the EC field is also in hex |
Date: | Tue, 7 Mar 2017 14:49:59 -0300 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.1 |
On 03/07/2017 12:50 PM, Alex Bennée wrote:
..just like the rest of the displayed ESR register. Otherwise people might scratch their heads if a not obviously hex number is displayed for the EC field. Signed-off-by: Alex Bennée <address@hidden> Reviewed-by: Peter Maydell <address@hidden> Reviewed-by: KONRAD Frederic <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
--- target/arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 3f4211b572..76b608f0ba 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6857,7 +6857,7 @@ void arm_cpu_do_interrupt(CPUState *cs) new_el); if (qemu_loglevel_mask(CPU_LOG_INT) && !excp_is_internal(cs->exception_index)) { - qemu_log_mask(CPU_LOG_INT, "...with ESR %x/0x%" PRIx32 "\n", + qemu_log_mask(CPU_LOG_INT, "...with ESR 0x%x/0x%" PRIx32 "\n", env->exception.syndrome >> ARM_EL_EC_SHIFT, env->exception.syndrome); }
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