Re: [Qemu-devel] [Qemu-ppc] [PATCH 1/3] target/ppc: fmadd check for excp independently

[Programmingkid]

On Mar 3, 2017, at 4:59 AM, address@hidden wrote:

> 
> Current order of checking does not confirm with the spec
> (ISA 3.0: MultiplyAddDP page-469). Change the order and make them
> independent of each other.
> 
> For example: a = infinity, b = zero, c = SNaN, this should set both
> VXIMZ and VXNAN
> 
> Signed-off-by: Nikunj A Dadhania <address@hidden>
> ---
> target/ppc/fpu_helper.c | 20 ++++++++++++--------
> 1 file changed, 12 insertions(+), 8 deletions(-)
> 
> diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
> index 0535ad0..a547f58 100644
> --- a/target/ppc/fpu_helper.c
> +++ b/target/ppc/fpu_helper.c
> @@ -747,17 +747,21 @@ static void float64_maddsub_update_excp(CPUPPCState 
> *env, float64 arg1,
>                                         float64 arg2, float64 arg3,
>                                         unsigned int madd_flags)
> {
> +    if (unlikely(float64_is_signaling_nan(arg1, &env->fp_status) ||
> +                 float64_is_signaling_nan(arg2, &env->fp_status) ||
> +                 float64_is_signaling_nan(arg3, &env->fp_status))) {
> +        /* sNaN operation */
> +        float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1);
> +    }
> +
>     if (unlikely((float64_is_infinity(arg1) && float64_is_zero(arg2)) ||
>                  (float64_is_zero(arg1) && float64_is_infinity(arg2)))) {
>         /* Multiplication of zero by infinity */
> -        arg1 = float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1);
> -    } else if (unlikely(float64_is_signaling_nan(arg1, &env->fp_status) ||
> -                        float64_is_signaling_nan(arg2, &env->fp_status) ||
> -                        float64_is_signaling_nan(arg3, &env->fp_status))) {
> -        /* sNaN operation */
> -        float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1);
> -    } else if ((float64_is_infinity(arg1) || float64_is_infinity(arg2)) &&
> -               float64_is_infinity(arg3)) {
> +        float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1);
> +    }
> +
> +    if ((float64_is_infinity(arg1) || float64_is_infinity(arg2)) &&
> +        float64_is_infinity(arg3)) {
>         uint8_t aSign, bSign, cSign;
> 
>         aSign = float64_is_neg(arg1);
> -- 
> 2.7.4


I'm having difficulty applying this patch. I took a look at 
float64_maddsub_update_excp() in fpu_helper.c and found out why. This function 
doesn't exist. Are you missing a patch?