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[Qemu-devel] [PULL 28/43] target/ppc/POWER9: Add ISAv3.00 MMU definition
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 28/43] target/ppc/POWER9: Add ISAv3.00 MMU definition |
Date: |
Wed, 22 Feb 2017 17:33:33 +1100 |
From: Suraj Jitindar Singh <address@hidden>
POWER9 processors implement the mmu as defined in version 3.00 of the ISA.
Add a definition for this mmu model and set the POWER9 cpu model to use
this mmu model.
Signed-off-by: Suraj Jitindar Singh <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/cpu-qom.h | 5 ++++-
target/ppc/mmu_helper.c | 2 ++
target/ppc/translate_init.c | 3 +--
3 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
index b7977ba..4e3132b 100644
--- a/target/ppc/cpu-qom.h
+++ b/target/ppc/cpu-qom.h
@@ -86,10 +86,13 @@ enum powerpc_mmu_t {
POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
| POWERPC_MMU_64K
| POWERPC_MMU_AMR | 0x00000004,
- /* FIXME Add POWERPC_MMU_3_OO defines */
/* Architecture 2.07 "degraded" (no 1T segments) */
POWERPC_MMU_2_07a = POWERPC_MMU_64 | POWERPC_MMU_AMR
| 0x00000004,
+ /* Architecture 3.00 variant */
+ POWERPC_MMU_3_00 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
+ | POWERPC_MMU_64K
+ | POWERPC_MMU_AMR | 0x00000005,
};
/*****************************************************************************/
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index f746f53..172a305 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -1935,6 +1935,7 @@ void ppc_tlb_invalidate_all(CPUPPCState *env)
case POWERPC_MMU_2_06a:
case POWERPC_MMU_2_07:
case POWERPC_MMU_2_07a:
+ case POWERPC_MMU_3_00:
#endif /* defined(TARGET_PPC64) */
env->tlb_need_flush = 0;
tlb_flush(CPU(cpu));
@@ -1974,6 +1975,7 @@ void ppc_tlb_invalidate_one(CPUPPCState *env,
target_ulong addr)
case POWERPC_MMU_2_06a:
case POWERPC_MMU_2_07:
case POWERPC_MMU_2_07a:
+ case POWERPC_MMU_3_00:
/* tlbie invalidate TLBs for all segments */
/* XXX: given the fact that there are too many segments to invalidate,
* and we still don't have a tlb_flush_mask(env, n, mask) in QEMU,
diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
index 76f79fa..84bf125 100644
--- a/target/ppc/translate_init.c
+++ b/target/ppc/translate_init.c
@@ -8816,8 +8816,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
(1ull << MSR_PMM) |
(1ull << MSR_RI) |
(1ull << MSR_LE);
- /* Using 2.07 defines until new radix model is added. */
- pcc->mmu_model = POWERPC_MMU_2_07;
+ pcc->mmu_model = POWERPC_MMU_3_00;
#if defined(CONFIG_SOFTMMU)
pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;
/* segment page size remain the same */
--
2.9.3
- [Qemu-devel] [PULL 02/43] spapr: move spapr_core_[foo]plug() callbacks close to machine code in spapr.c, (continued)
- [Qemu-devel] [PULL 02/43] spapr: move spapr_core_[foo]plug() callbacks close to machine code in spapr.c, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 07/43] ppc: implement xssubqp instruction, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 06/43] ppc: implement xssqrtqp instruction, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 11/43] spapr: fix off-by-one error in spapr_ovec_populate_dt(), David Gibson, 2017/02/22
- [Qemu-devel] [PULL 33/43] pc: move pcms->possible_cpus init out of pc_cpus_init(), David Gibson, 2017/02/22
- [Qemu-devel] [PULL 24/43] softfloat: Add float128_to_uint32_round_to_zero(), David Gibson, 2017/02/22
- [Qemu-devel] [PULL 36/43] change CPUArchId.cpu type to Object*, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 13/43] target-ppc: implement store atomic instruction, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 26/43] target-ppc: Add xscvqpudz and xscvqpuwz instructions, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 15/43] target-ppc: add slbieg instruction, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 28/43] target/ppc/POWER9: Add ISAv3.00 MMU definition,
David Gibson <=
- [Qemu-devel] [PULL 23/43] softfloat: Add float128_to_uint64_round_to_zero(), David Gibson, 2017/02/22
- [Qemu-devel] [PULL 22/43] softfloat: Add round-to-odd rounding mode, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 20/43] ppc4xx: replace debug printf with trace points, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 19/43] mac99: replace debug printf with trace points, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 10/43] target-ppc: Add xsmaxjdp and xsminjdp instructions, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 25/43] target-ppc: Implement round to odd variants of quad FP instructions, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 35/43] pc: pass apic_id to pc_find_cpu_slot() directly so lookup could be done without CPU object, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 21/43] spapr: replace debug printf with trace points, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 32/43] machine: move possible_cpus to MachineState, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 34/43] pc: calculate topology only once when possible_cpus is initialised, David Gibson, 2017/02/22