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[Qemu-devel] [PATCH v2 15/16] target-m68k: add more FPU instructions
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH v2 15/16] target-m68k: add more FPU instructions |
Date: |
Mon, 30 Jan 2017 19:16:33 +0100 |
Add fsinh, flognp1, ftanh, fatan, fasin, fatanh,
fsin, ftan, fetox, ftwotox, ftentox, flogn, flog10, facos,
fcos.
As softfloat library does not provide these functions,
we us the libm of the host.
Signed-off-by: Laurent Vivier <address@hidden>
---
target/m68k/fpu_helper.c | 237 +++++++++++++++++++++++++++++++++++++++++++++++
target/m68k/helper.h | 16 ++++
target/m68k/translate.c | 48 ++++++++++
3 files changed, 301 insertions(+)
diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c
index c69efe1..95d5cc4 100644
--- a/target/m68k/fpu_helper.c
+++ b/target/m68k/fpu_helper.c
@@ -23,6 +23,7 @@
#include "cpu.h"
#include "exec/helper-proto.h"
#include "exec/exec-all.h"
+#include <math.h>
static const floatx80 fpu_rom[128] = {
[0x00] = floatx80_pi, /* Pi */
@@ -712,3 +713,239 @@ void HELPER(mod_FP0_FP1)(CPUM68KState *env)
floatx80_to_FP0(env, res);
}
+
+static long double floatx80_to_ldouble(floatx80 val)
+{
+ if (floatx80_is_infinity(val)) {
+ if (floatx80_is_neg(val)) {
+ return -__builtin_infl();
+ }
+ return __builtin_infl();
+ }
+ if (floatx80_is_any_nan(val)) {
+ char low[20];
+ sprintf(low, "0x%016"PRIx64, val.low);
+
+ return nanl(low);
+ }
+
+ return *(long double *)&val;
+}
+
+static floatx80 ldouble_to_floatx80(long double val)
+{
+ floatx80 res;
+
+ if (isinf(val)) {
+ res.high = floatx80_default_nan(NULL).high;
+ res.low = 0;
+ }
+ if (isinf(val) < 0) {
+ res.high |= 0x8000;
+ }
+ if (isnan(val)) {
+ res.high = floatx80_default_nan(NULL).high;
+ res.low = *(uint64_t *)((char *)&val + 4);
+ }
+ return *(floatx80 *)&val;
+}
+
+void HELPER(sinh_FP0)(CPUM68KState *env)
+{
+ floatx80 res;
+ long double val;
+
+ val = sinhl(floatx80_to_ldouble(FP0_to_floatx80(env)));
+ res = ldouble_to_floatx80(val);
+
+ floatx80_to_FP0(env, res);
+}
+
+void HELPER(lognp1_FP0)(CPUM68KState *env)
+{
+ floatx80 val;
+ long double res;
+
+ val = FP0_to_floatx80(env);
+ res = logl(floatx80_to_ldouble(val) + 1.0);
+
+ floatx80_to_FP0(env, ldouble_to_floatx80(res));
+}
+
+void HELPER(ln_FP0)(CPUM68KState *env)
+{
+ floatx80 val;
+ long double res;
+
+ val = FP0_to_floatx80(env);
+ res = logl(floatx80_to_ldouble(val));
+
+ floatx80_to_FP0(env, ldouble_to_floatx80(res));
+}
+
+void HELPER(log10_FP0)(CPUM68KState *env)
+{
+ floatx80 val;
+ long double res;
+
+ val = FP0_to_floatx80(env);
+ res = log10l(floatx80_to_ldouble(val));
+
+ floatx80_to_FP0(env, ldouble_to_floatx80(res));
+}
+
+void HELPER(atan_FP0)(CPUM68KState *env)
+{
+ floatx80 res;
+ long double val;
+
+ val = floatx80_to_ldouble(FP0_to_floatx80(env));
+
+ val = atanl(val);
+ res = ldouble_to_floatx80(val);
+ floatx80_to_FP0(env, res);
+}
+
+void HELPER(asin_FP0)(CPUM68KState *env)
+{
+ floatx80 res;
+ long double val;
+
+ val = floatx80_to_ldouble(FP0_to_floatx80(env));
+ if (val < -1.0 || val > 1.0) {
+ floatx80_to_FP0(env, floatx80_default_nan(NULL));
+ return;
+ }
+
+ val = asinl(val);
+ res = ldouble_to_floatx80(val);
+ floatx80_to_FP0(env, res);
+}
+
+void HELPER(atanh_FP0)(CPUM68KState *env)
+{
+ floatx80 res;
+ long double val;
+
+ val = floatx80_to_ldouble(FP0_to_floatx80(env));
+ if (val < -1.0 || val > 1.0) {
+ floatx80_to_FP0(env, floatx80_default_nan(NULL));
+ return;
+ }
+
+ val = atanhl(val);
+ res = ldouble_to_floatx80(val);
+ floatx80_to_FP0(env, res);
+}
+
+void HELPER(sin_FP0)(CPUM68KState *env)
+{
+ floatx80 res;
+ long double val;
+
+ val = floatx80_to_ldouble(FP0_to_floatx80(env));
+
+ val = sinl(val);
+ res = ldouble_to_floatx80(val);
+ floatx80_to_FP0(env, res);
+}
+
+void HELPER(tanh_FP0)(CPUM68KState *env)
+{
+ floatx80 res;
+ long double val;
+
+ val = floatx80_to_ldouble(FP0_to_floatx80(env));
+
+ val = tanhl(val);
+ res = ldouble_to_floatx80(val);
+ floatx80_to_FP0(env, res);
+}
+
+void HELPER(tan_FP0)(CPUM68KState *env)
+{
+ floatx80 res;
+ long double val;
+
+ val = floatx80_to_ldouble(FP0_to_floatx80(env));
+
+ val = tanl(val);
+ res = ldouble_to_floatx80(val);
+ floatx80_to_FP0(env, res);
+}
+
+void HELPER(exp_FP0)(CPUM68KState *env)
+{
+ floatx80 f;
+ long double res;
+
+ f = FP0_to_floatx80(env);
+
+ res = expl(floatx80_to_ldouble(f));
+
+ floatx80_to_FP0(env, ldouble_to_floatx80(res));
+}
+
+void HELPER(exp2_FP0)(CPUM68KState *env)
+{
+ floatx80 f;
+ long double res;
+
+ f = FP0_to_floatx80(env);
+
+ res = exp2l(floatx80_to_ldouble(f));
+
+ floatx80_to_FP0(env, ldouble_to_floatx80(res));
+}
+
+void HELPER(exp10_FP0)(CPUM68KState *env)
+{
+ floatx80 res;
+ long double val;
+
+ val = floatx80_to_ldouble(FP0_to_floatx80(env));
+
+ val = exp10l(val);
+ res = ldouble_to_floatx80(val);
+ floatx80_to_FP0(env, res);
+}
+
+void HELPER(cosh_FP0)(CPUM68KState *env)
+{
+ floatx80 res;
+ long double val;
+
+ val = floatx80_to_ldouble(FP0_to_floatx80(env));
+
+ val = coshl(val);
+ res = ldouble_to_floatx80(val);
+ floatx80_to_FP0(env, res);
+}
+
+void HELPER(acos_FP0)(CPUM68KState *env)
+{
+ floatx80 res;
+ long double val;
+
+ val = floatx80_to_ldouble(FP0_to_floatx80(env));
+ if (val < -1.0 || val > 1.0) {
+ floatx80_to_FP0(env, floatx80_default_nan(NULL));
+ return;
+ }
+
+ val = acosl(val);
+ res = ldouble_to_floatx80(val);
+ floatx80_to_FP0(env, res);
+}
+
+void HELPER(cos_FP0)(CPUM68KState *env)
+{
+ floatx80 res;
+ long double val;
+
+ val = floatx80_to_ldouble(FP0_to_floatx80(env));
+
+ val = cosl(val);
+ res = ldouble_to_floatx80(val);
+ floatx80_to_FP0(env, res);
+}
diff --git a/target/m68k/helper.h b/target/m68k/helper.h
index 07aa04f..600a9a6 100644
--- a/target/m68k/helper.h
+++ b/target/m68k/helper.h
@@ -53,6 +53,22 @@ DEF_HELPER_1(getexp_FP0, void, env)
DEF_HELPER_1(getman_FP0, void, env)
DEF_HELPER_1(scale_FP0_FP1, void, env)
DEF_HELPER_1(mod_FP0_FP1, void, env)
+DEF_HELPER_1(sinh_FP0, void, env)
+DEF_HELPER_1(lognp1_FP0, void, env)
+DEF_HELPER_1(atan_FP0, void, env)
+DEF_HELPER_1(asin_FP0, void, env)
+DEF_HELPER_1(atanh_FP0, void, env)
+DEF_HELPER_1(sin_FP0, void, env)
+DEF_HELPER_1(tanh_FP0, void, env)
+DEF_HELPER_1(tan_FP0, void, env)
+DEF_HELPER_1(exp_FP0, void, env)
+DEF_HELPER_1(exp2_FP0, void, env)
+DEF_HELPER_1(exp10_FP0, void, env)
+DEF_HELPER_1(ln_FP0, void, env)
+DEF_HELPER_1(log10_FP0, void, env)
+DEF_HELPER_1(cosh_FP0, void, env)
+DEF_HELPER_1(acos_FP0, void, env)
+DEF_HELPER_1(cos_FP0, void, env)
DEF_HELPER_3(mac_move, void, env, i32, i32)
DEF_HELPER_3(macmulf, i64, env, i32, i32)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index f238d30..4af6a98 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4625,6 +4625,9 @@ DISAS_INSN(fpu)
case 1: /* fint */
gen_helper_iround_FP0(cpu_env);
break;
+ case 2: /* fsinh */
+ gen_helper_sinh_FP0(cpu_env);
+ break;
case 3: /* fintrz */
gen_helper_itrunc_FP0(cpu_env);
break;
@@ -4637,6 +4640,42 @@ DISAS_INSN(fpu)
case 0x45: /* fdsqrt */
gen_helper_dsqrt_FP0(cpu_env);
break;
+ case 0x06: /* flognp1 */
+ gen_helper_lognp1_FP0(cpu_env);
+ break;
+ case 0x09: /* ftanh */
+ gen_helper_tanh_FP0(cpu_env);
+ break;
+ case 0x0a: /* fatan */
+ gen_helper_atan_FP0(cpu_env);
+ break;
+ case 0x0c: /* fasin */
+ gen_helper_asin_FP0(cpu_env);
+ break;
+ case 0x0d: /* fatanh */
+ gen_helper_atanh_FP0(cpu_env);
+ break;
+ case 0x0e: /* fsin */
+ gen_helper_sin_FP0(cpu_env);
+ break;
+ case 0x0f: /* ftan */
+ gen_helper_tan_FP0(cpu_env);
+ break;
+ case 0x10: /* fetox */
+ gen_helper_exp_FP0(cpu_env);
+ break;
+ case 0x11: /* ftwotox */
+ gen_helper_exp2_FP0(cpu_env);
+ break;
+ case 0x12: /* ftentox */
+ gen_helper_exp10_FP0(cpu_env);
+ break;
+ case 0x14: /* flogn */
+ gen_helper_ln_FP0(cpu_env);
+ break;
+ case 0x15: /* flog10 */
+ gen_helper_log10_FP0(cpu_env);
+ break;
case 0x18: /* fabs */
gen_helper_abs_FP0(cpu_env);
break;
@@ -4646,6 +4685,9 @@ DISAS_INSN(fpu)
case 0x5c: /* fdabs */
gen_helper_dabs_FP0(cpu_env);
break;
+ case 0x19: /* fcosh */
+ gen_helper_cosh_FP0(cpu_env);
+ break;
case 0x1a: /* fneg */
gen_helper_neg_FP0(cpu_env);
break;
@@ -4655,6 +4697,12 @@ DISAS_INSN(fpu)
case 0x5e: /* fdneg */
gen_helper_dneg_FP0(cpu_env);
break;
+ case 0x1c: /* facos */
+ gen_helper_acos_FP0(cpu_env);
+ break;
+ case 0x1d: /* fcos */
+ gen_helper_cos_FP0(cpu_env);
+ break;
case 0x1e: /* fgetexp */
gen_helper_getexp_FP0(cpu_env);
break;
--
2.9.3
- [Qemu-devel] [PATCH v2 04/16] target-m68k: define ext_opsize, (continued)
- [Qemu-devel] [PATCH v2 04/16] target-m68k: define ext_opsize, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 07/16] target-m68k: manage FPU exceptions, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 03/16] target-m68k: move FPU helpers to fpu_helper.c, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 13/16] target-m68k: add fsglmul and fsgldiv, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 08/16] target-m68k: define 96bit FP registers for gdb on 680x0, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 06/16] target-m68k: add FPCR and FPSR, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 10/16] target-m68k: add fscc., Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 09/16] target-m68k: add fmovem, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 12/16] target-m68k: add fscale, fgetman, fgetexp and fmod, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 14/16] target-m68k: add explicit single and double precision operations, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 15/16] target-m68k: add more FPU instructions,
Laurent Vivier <=
- [Qemu-devel] [PATCH v2 05/16] target-m68k: use floatx80 internally, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 16/16] target-m68k: add fsincos, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 11/16] target-m68k: add fmovecr, Laurent Vivier, 2017/01/30
- Re: [Qemu-devel] [PATCH v2 00/16] target-m68k: implement 680x0 FPU, Andreas Schwab, 2017/01/30
- Re: [Qemu-devel] [PATCH v2 00/16] target-m68k: implement 680x0 FPU, no-reply, 2017/01/30