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[Qemu-devel] [PULL 08/11] tcg-mips: Add tcg unwind info
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 08/11] tcg-mips: Add tcg unwind info |
Date: |
Sun, 8 Jan 2017 09:56:17 -0800 |
From: Jin Guojie <address@hidden>
Tested-by: Aurelien Jarno <address@hidden>
Tested-by: James Hogan <address@hidden>
Tested-by: YunQiang Su <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Jin Guojie <address@hidden>
Message-Id: <address@hidden>
---
tcg/mips/tcg-target.inc.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
index 9e24662..b7e2586 100644
--- a/tcg/mips/tcg-target.inc.c
+++ b/tcg/mips/tcg-target.inc.c
@@ -2465,3 +2465,47 @@ void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t
addr)
atomic_set((uint32_t *)jmp_addr, deposit32(OPC_J, 0, 26, addr >> 2));
flush_icache_range(jmp_addr, jmp_addr + 4);
}
+
+typedef struct {
+ DebugFrameHeader h;
+ uint8_t fde_def_cfa[4];
+ uint8_t fde_reg_ofs[ARRAY_SIZE(tcg_target_callee_save_regs) * 2];
+} DebugFrame;
+
+#define ELF_HOST_MACHINE EM_MIPS
+/* GDB doesn't appear to require proper setting of ELF_HOST_FLAGS,
+ which is good because they're really quite complicated for MIPS. */
+
+static const DebugFrame debug_frame = {
+ .h.cie.len = sizeof(DebugFrameCIE) - 4, /* length after .len member */
+ .h.cie.id = -1,
+ .h.cie.version = 1,
+ .h.cie.code_align = 1,
+ .h.cie.data_align = -(TCG_TARGET_REG_BITS / 8) & 0x7f, /* sleb128 */
+ .h.cie.return_column = TCG_REG_RA,
+
+ /* Total FDE size does not include the "len" member. */
+ .h.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, h.fde.cie_offset),
+
+ .fde_def_cfa = {
+ 12, TCG_REG_SP, /* DW_CFA_def_cfa sp, ... */
+ (FRAME_SIZE & 0x7f) | 0x80, /* ... uleb128 FRAME_SIZE */
+ (FRAME_SIZE >> 7)
+ },
+ .fde_reg_ofs = {
+ 0x80 + 16, 9, /* DW_CFA_offset, s0, -72 */
+ 0x80 + 17, 8, /* DW_CFA_offset, s2, -64 */
+ 0x80 + 18, 7, /* DW_CFA_offset, s3, -56 */
+ 0x80 + 19, 6, /* DW_CFA_offset, s4, -48 */
+ 0x80 + 20, 5, /* DW_CFA_offset, s5, -40 */
+ 0x80 + 21, 4, /* DW_CFA_offset, s6, -32 */
+ 0x80 + 22, 3, /* DW_CFA_offset, s7, -24 */
+ 0x80 + 30, 2, /* DW_CFA_offset, s8, -16 */
+ 0x80 + 31, 1, /* DW_CFA_offset, ra, -8 */
+ }
+};
+
+void tcg_register_jit(void *buf, size_t buf_size)
+{
+ tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame));
+}
--
2.9.3
- [Qemu-devel] [PULL 00/11] tcg host mips64 support, Richard Henderson, 2017/01/08
- [Qemu-devel] [PULL 02/11] tcg-mips: Add mips64 opcodes, Richard Henderson, 2017/01/08
- [Qemu-devel] [PULL 04/11] tcg-mips: Add bswap32u and bswap64, Richard Henderson, 2017/01/08
- [Qemu-devel] [PULL 05/11] tcg-mips: Adjust move functions for mips64, Richard Henderson, 2017/01/08
- [Qemu-devel] [PULL 06/11] tcg-mips: Adjust load/store functions for mips64, Richard Henderson, 2017/01/08
- [Qemu-devel] [PULL 08/11] tcg-mips: Add tcg unwind info,
Richard Henderson <=
- [Qemu-devel] [PULL 01/11] tcg-mips: Move bswap code to a subroutine, Richard Henderson, 2017/01/08
- [Qemu-devel] [PULL 03/11] tcg-mips: Support 64-bit opcodes, Richard Henderson, 2017/01/08
- [Qemu-devel] [PULL 07/11] tcg-mips: Adjust prologue for mips64, Richard Henderson, 2017/01/08
- [Qemu-devel] [PULL 11/11] translate-all: Avoid -Werror=switch-bool, Richard Henderson, 2017/01/08
- [Qemu-devel] [PULL 10/11] tcg-mips: Adjust qemu_ld/st for mips64, Richard Henderson, 2017/01/08
- [Qemu-devel] [PULL 09/11] tcg-mips: Adjust calling conventions for mips64, Richard Henderson, 2017/01/08