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Re: [Qemu-devel] [PATCH 06/13] target-ppc: implement stxvll instructions
From: |
Nikunj A Dadhania |
Subject: |
Re: [Qemu-devel] [PATCH 06/13] target-ppc: implement stxvll instructions |
Date: |
Tue, 06 Dec 2016 11:33:02 +0530 |
User-agent: |
Notmuch/0.21 (https://notmuchmail.org) Emacs/25.0.94.1 (x86_64-redhat-linux-gnu) |
Richard Henderson <address@hidden> writes:
> On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote:
>> + getVSR(xt_num, &xt, env);
>> + if (msr_le) {
>> + for (i = 0; i < end; i++) {
>> + cpu_stb_data_ra(env, addr, xt.u8[i], GETPC());
>> + addr = addr_add(env, addr, 1);
>> + }
>> + } else {
>> + for (i = 15; i > 15 - end; i--) {
>> + cpu_stb_data_ra(env, addr, xt.u8[i], GETPC());
>> + addr = addr_add(env, addr, 1);
>> + }
>> + }
>
> Have you accidentally swapped the implementations of stxvl and stxvll?
Now I am in doubt :-)
Let me put my understanding here.
In case of stxvl if we have following vector:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
BE |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
LE |00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"|
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
So for LE/BE: u[0] = "T", u[1] = "h", u[2] = "i", u[3] = "s", ....
Storage should be of following order:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
While in case of stxvll
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
BE/LE |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
For LE: u[0] = 0, u[1] = 0, u[2] = "T", u[3] = "S", ....
For BE: u[0] = "T", u[1] = "h", u[2]="i", u[3]="s", ....
Storage should be of following order:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
Please let me know your thoughts.
While discussing here with Bharata, I think I will need to handle host
endian here?
Regards,
Nikunj
- [Qemu-devel] [PATCH 01/13] target-ppc: move ppc_vsr_t to common header, (continued)
- [Qemu-devel] [PATCH 01/13] target-ppc: move ppc_vsr_t to common header, Nikunj A Dadhania, 2016/12/05
- [Qemu-devel] [PATCH 05/13] target-ppc: implement stxvl instruction, Nikunj A Dadhania, 2016/12/05
- [Qemu-devel] [PATCH 04/13] target-ppc: implement lxvll instruction, Nikunj A Dadhania, 2016/12/05
- [Qemu-devel] [PATCH 06/13] target-ppc: implement stxvll instructions, Nikunj A Dadhania, 2016/12/05
- [Qemu-devel] [PATCH 07/13] target-ppc: implement xxextractuw instruction, Nikunj A Dadhania, 2016/12/05
- [Qemu-devel] [PATCH 09/13] target-ppc: implement stop instruction, Nikunj A Dadhania, 2016/12/05
- [Qemu-devel] [PATCH 08/13] target-ppc: implement xxinsertw instruction, Nikunj A Dadhania, 2016/12/05
- [Qemu-devel] [PATCH 10/13] target-ppc: implement xsabsqp/xsnabsqp instruction, Nikunj A Dadhania, 2016/12/05
- [Qemu-devel] [PATCH 13/13] target-ppc: Add xxperm and xxpermr instructions, Nikunj A Dadhania, 2016/12/05