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[Qemu-devel] [PATCH for-2.9 03/30] aspeed: QOMify the CPU object and att
From: |
Cédric Le Goater |
Subject: |
[Qemu-devel] [PATCH for-2.9 03/30] aspeed: QOMify the CPU object and attach it to the SoC |
Date: |
Tue, 29 Nov 2016 16:43:41 +0100 |
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Joel Stanley <address@hidden>
Reviewed-by: Andrew Jeffery <address@hidden>
---
hw/arm/aspeed_soc.c | 17 ++++++++++++++---
include/hw/arm/aspeed_soc.h | 2 +-
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index e14f5c217eab..db145e201451 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -87,9 +87,13 @@ static void aspeed_soc_init(Object *obj)
{
AspeedSoCState *s = ASPEED_SOC(obj);
AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
+ char *cpu_typename;
int i;
- s->cpu = cpu_arm_init(sc->info->cpu_model);
+ cpu_typename = g_strdup_printf("%s-" TYPE_ARM_CPU, sc->info->cpu_model);
+ object_initialize(&s->cpu, sizeof(s->cpu), cpu_typename);
+ object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
+ g_free(cpu_typename);
object_initialize(&s->vic, sizeof(s->vic), TYPE_ASPEED_VIC);
object_property_add_child(obj, "vic", OBJECT(&s->vic), NULL);
@@ -146,6 +150,13 @@ static void aspeed_soc_realize(DeviceState *dev, Error
**errp)
memory_region_add_subregion_overlap(get_system_memory(),
ASPEED_SOC_IOMEM_BASE, &s->iomem, -1);
+ /* CPU */
+ object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+
/* VIC */
object_property_set_bool(OBJECT(&s->vic), true, "realized", &err);
if (err) {
@@ -154,9 +165,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error
**errp)
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->vic), 0, ASPEED_SOC_VIC_BASE);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 0,
- qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ));
+ qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 1,
- qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ));
+ qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
/* Timer */
object_property_set_bool(OBJECT(&s->timerctrl), true, "realized", &err);
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 5406b498d7ef..6f1b679c97b1 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -27,7 +27,7 @@ typedef struct AspeedSoCState {
DeviceState parent;
/*< public >*/
- ARMCPU *cpu;
+ ARMCPU cpu;
MemoryRegion iomem;
AspeedVICState vic;
AspeedTimerCtrlState timerctrl;
--
2.7.4
- [Qemu-devel] [PATCH for-2.9 00/30] Aspeed SoC fixes and model improvements, Cédric Le Goater, 2016/11/29
- [Qemu-devel] [PATCH for-2.9 01/30] target-arm: Add VBAR support to ARM1176 CPUs, Cédric Le Goater, 2016/11/29
- [Qemu-devel] [PATCH for-2.9 02/30] m25p80: add support for the mx66l1g45g, Cédric Le Goater, 2016/11/29
- [Qemu-devel] [PATCH for-2.9 03/30] aspeed: QOMify the CPU object and attach it to the SoC,
Cédric Le Goater <=
- [Qemu-devel] [PATCH for-2.9 04/30] aspeed: remove cannot_destroy_with_object_finalize_yet, Cédric Le Goater, 2016/11/29
- [Qemu-devel] [PATCH for-2.9 06/30] aspeed: extend the board configuration with flash models, Cédric Le Goater, 2016/11/29
- [Qemu-devel] [PATCH for-2.9 05/30] aspeed: attach the second SPI controller object to the SoC, Cédric Le Goater, 2016/11/29
- [Qemu-devel] [PATCH for-2.9 07/30] aspeed: add support for the romulus-bmc board, Cédric Le Goater, 2016/11/29
- [Qemu-devel] [PATCH for-2.9 08/30] aspeed: add a memory region for SRAM, Cédric Le Goater, 2016/11/29
- [Qemu-devel] [PATCH for-2.9 09/30] aspeed: add the definitions for the AST2400 A1 SoC, Cédric Le Goater, 2016/11/29
- [Qemu-devel] [PATCH for-2.9 10/30] aspeed: change SoC revision of the palmetto-bmc machine, Cédric Le Goater, 2016/11/29
- [Qemu-devel] [PATCH for-2.9 11/30] aspeed/scu: fix SCU region size, Cédric Le Goater, 2016/11/29
- [Qemu-devel] [PATCH for-2.9 12/30] aspeed/smc: improve segment register support, Cédric Le Goater, 2016/11/29
- [Qemu-devel] [PATCH for-2.9 13/30] aspeed/smc: set the number of flash modules for the FMC controller, Cédric Le Goater, 2016/11/29