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[Qemu-devel] [PATCH v4 37/64] target-xtensa: Use clz opcode
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v4 37/64] target-xtensa: Use clz opcode |
Date: |
Wed, 23 Nov 2016 14:01:34 +0100 |
Signed-off-by: Richard Henderson <address@hidden>
---
target-xtensa/helper.h | 2 --
target-xtensa/op_helper.c | 13 -------------
target-xtensa/translate.c | 13 +++++++++++--
3 files changed, 11 insertions(+), 17 deletions(-)
diff --git a/target-xtensa/helper.h b/target-xtensa/helper.h
index 5ea9c5b..0c8adae 100644
--- a/target-xtensa/helper.h
+++ b/target-xtensa/helper.h
@@ -3,8 +3,6 @@ DEF_HELPER_3(exception_cause, noreturn, env, i32, i32)
DEF_HELPER_4(exception_cause_vaddr, noreturn, env, i32, i32, i32)
DEF_HELPER_3(debug_exception, noreturn, env, i32, i32)
-DEF_HELPER_FLAGS_1(nsa, TCG_CALL_NO_RWG_SE, i32, i32)
-DEF_HELPER_FLAGS_1(nsau, TCG_CALL_NO_RWG_SE, i32, i32)
DEF_HELPER_2(wsr_windowbase, void, env, i32)
DEF_HELPER_4(entry, void, env, i32, i32, i32)
DEF_HELPER_2(retw, i32, env, i32)
diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index 0a4b214..dc25625 100644
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -161,19 +161,6 @@ void HELPER(debug_exception)(CPUXtensaState *env, uint32_t
pc, uint32_t cause)
HELPER(exception)(env, EXC_DEBUG);
}
-uint32_t HELPER(nsa)(uint32_t v)
-{
- if (v & 0x80000000) {
- v = ~v;
- }
- return v ? clz32(v) - 1 : 31;
-}
-
-uint32_t HELPER(nsau)(uint32_t v)
-{
- return v ? clz32(v) : 32;
-}
-
static void copy_window_from_phys(CPUXtensaState *env,
uint32_t window, uint32_t phys, uint32_t n)
{
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 0858c29..5c719a4 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -1372,14 +1372,23 @@ static void disas_xtensa_insn(CPUXtensaState *env,
DisasContext *dc)
case 14: /*NSAu*/
HAS_OPTION(XTENSA_OPTION_MISC_OP_NSA);
if (gen_window_check2(dc, RRR_S, RRR_T)) {
- gen_helper_nsa(cpu_R[RRR_T], cpu_R[RRR_S]);
+ TCGv_i32 t0 = tcg_temp_new_i32();
+
+ /* if (v & 0x80000000) v = ~v; */
+ tcg_gen_sari_i32(t0, cpu_R[RRR_S], 31);
+ tcg_gen_xor_i32(t0, t0, cpu_R[RRR_S]);
+
+ /* r = (v ? clz(v) : 32) - 1; */
+ tcg_gen_clzi_i32(t0, t0, 32);
+ tcg_gen_subi_i32(cpu_R[RRR_T], t0, 1);
+ tcg_temp_free_i32(t0);
}
break;
case 15: /*NSAUu*/
HAS_OPTION(XTENSA_OPTION_MISC_OP_NSA);
if (gen_window_check2(dc, RRR_S, RRR_T)) {
- gen_helper_nsau(cpu_R[RRR_T], cpu_R[RRR_S]);
+ tcg_gen_clzi_i32(cpu_R[RRR_T], cpu_R[RRR_S], 32);
}
break;
--
2.7.4
- [Qemu-devel] [PATCH v4 29/64] target-microblaze: Use clz opcode, (continued)
- [Qemu-devel] [PATCH v4 29/64] target-microblaze: Use clz opcode, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 28/64] target-cris: Use clz opcode, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 31/64] target-openrisc: Use clz and ctz opcodes, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 30/64] target-mips: Use clz opcode, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 32/64] target-ppc: Use clz and ctz opcodes, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 33/64] target-s390x: Use clz opcode, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 34/64] target-tilegx: Use clz and ctz opcodes, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 36/64] target-unicore32: Use clz opcode, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 35/64] target-tricore: Use clz opcode, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 38/64] target-arm: Use clz opcode, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 37/64] target-xtensa: Use clz opcode,
Richard Henderson <=
- [Qemu-devel] [PATCH v4 39/64] target-i386: Use clz and ctz opcodes, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 41/64] tcg/aarch64: Handle ctz and clz opcodes, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 40/64] tcg/ppc: Handle ctz and clz opcodes, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 43/64] tcg/mips: Handle clz opcode, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 42/64] tcg/arm: Handle ctz and clz opcodes, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 44/64] tcg/s390: Handle clz opcode, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 46/64] tcg/i386: Hoist common arguments in tcg_out_op, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 47/64] tcg/i386: Allow bmi2 shiftx to have non-matching operands, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 45/64] tcg/i386: Fuly convert tcg_target_op_def, Richard Henderson, 2016/11/23
- [Qemu-devel] [PATCH v4 51/64] target-arm: Use clrsb helper, Richard Henderson, 2016/11/23