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[Qemu-devel] [PULL for-2.8 00/15] target-sparc updates
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL for-2.8 00/15] target-sparc updates |
Date: |
Mon, 31 Oct 2016 09:52:38 -0600 |
Mark requested that I send my own pull for my patch series.
r~
The following changes since commit 4178c782f85530d261058abdccc734aa9b7c89ca:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20161028'
into staging (2016-10-31 11:12:02 +0000)
are available in the git repository at:
git://github.com/rth7680/qemu.git tags/pull-sparc-20161031
for you to fetch changes up to 24bf6eba1a656aa82519124e379122e61b1ee3bc:
target-sparc: Use tcg_gen_atomic_cmpxchg_tl (2016-10-31 09:46:25 -0600)
----------------------------------------------------------------
target-sparc updates for atomics and alignment
----------------------------------------------------------------
Richard Henderson (15):
target-sparc: Use overalignment flags for twinx and block asis
target-sparc: Introduce cpu_raise_exception_ra
target-sparc: Add MMU_PHYS_IDX
target-sparc: Use MMU_PHYS_IDX for bypass asis
target-sparc: Handle more twinx asis
target-sparc: Implement swap_asi inline
target-sparc: Implement ldstub_asi inline
target-sparc: Implement cas_asi/casx_asi inline
target-sparc: Implement BCOPY/BFILL inline
target-sparc: Remove asi helper code handled inline
target-sparc: Implement ldqf and stqf inline
target-sparc: Allow 4-byte alignment on fp mem ops
target-sparc: Remove MMU_MODE*_SUFFIX
target-sparc: Use tcg_gen_atomic_xchg_tl
target-sparc: Use tcg_gen_atomic_cmpxchg_tl
target-sparc/cpu.h | 34 +-
target-sparc/helper.c | 52 +--
target-sparc/helper.h | 7 -
target-sparc/ldst_helper.c | 1021 ++++++++------------------------------------
target-sparc/mmu_helper.c | 47 +-
target-sparc/translate.c | 434 ++++++++++++-------
target-sparc/win_helper.c | 37 +-
7 files changed, 540 insertions(+), 1092 deletions(-)
- [Qemu-devel] [PULL for-2.8 00/15] target-sparc updates,
Richard Henderson <=
- [Qemu-devel] [PULL for-2.8 01/15] target-sparc: Use overalignment flags for twinx and block asis, Richard Henderson, 2016/10/31
- [Qemu-devel] [PULL for-2.8 03/15] target-sparc: Add MMU_PHYS_IDX, Richard Henderson, 2016/10/31
- [Qemu-devel] [PULL for-2.8 02/15] target-sparc: Introduce cpu_raise_exception_ra, Richard Henderson, 2016/10/31
- [Qemu-devel] [PULL for-2.8 04/15] target-sparc: Use MMU_PHYS_IDX for bypass asis, Richard Henderson, 2016/10/31
- [Qemu-devel] [PULL for-2.8 05/15] target-sparc: Handle more twinx asis, Richard Henderson, 2016/10/31
- [Qemu-devel] [PULL for-2.8 07/15] target-sparc: Implement ldstub_asi inline, Richard Henderson, 2016/10/31
- [Qemu-devel] [PULL for-2.8 08/15] target-sparc: Implement cas_asi/casx_asi inline, Richard Henderson, 2016/10/31
- [Qemu-devel] [PULL for-2.8 06/15] target-sparc: Implement swap_asi inline, Richard Henderson, 2016/10/31
- [Qemu-devel] [PULL for-2.8 09/15] target-sparc: Implement BCOPY/BFILL inline, Richard Henderson, 2016/10/31
- [Qemu-devel] [PULL for-2.8 11/15] target-sparc: Implement ldqf and stqf inline, Richard Henderson, 2016/10/31