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[Qemu-devel] [PATCH 09/23] target-m68k: REG() macro cleanup
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH 09/23] target-m68k: REG() macro cleanup |
Date: |
Tue, 25 Oct 2016 16:50:07 +0200 |
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
target-m68k/translate.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 639db76..50c55a4 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -59,9 +59,10 @@ static TCGv cpu_aregs[8];
static TCGv_i64 cpu_fregs[8];
static TCGv_i64 cpu_macc[4];
-#define DREG(insn, pos) cpu_dregs[((insn) >> (pos)) & 7]
-#define AREG(insn, pos) cpu_aregs[((insn) >> (pos)) & 7]
-#define FREG(insn, pos) cpu_fregs[((insn) >> (pos)) & 7]
+#define REG(insn, pos) (((insn) >> (pos)) & 7)
+#define DREG(insn, pos) cpu_dregs[REG(insn, pos)]
+#define AREG(insn, pos) cpu_aregs[REG(insn, pos)]
+#define FREG(insn, pos) cpu_fregs[REG(insn, pos)]
#define MACREG(acc) cpu_macc[acc]
#define QREG_SP cpu_aregs[7]
--
2.7.4
- [Qemu-devel] [PATCH 00/23] target-m68k: prepare to introduce 680x0 instruction set, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 08/23] target-m68k: set PAGE_BITS to 12 for m68k, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 10/23] target-m68k: allow to update flags with operation on words and bytes, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 01/23] target-m68k: fix DEBUG_DISPATCH, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 02/23] target-m68k: Build the opcode table only once to avoid multithreading issues, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 04/23] target-m68k: manage scaled index, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 06/23] target-m68k: set disassembler mode to 680x0 or coldfire, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 03/23] target-m68k: define m680x0 CPUs and features, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 09/23] target-m68k: REG() macro cleanup,
Laurent Vivier <=
- [Qemu-devel] [PATCH 07/23] target-m68k: define operand sizes, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 05/23] target-m68k: introduce read_imXX() functions, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 12/23] target-m68k: remove m68k_cpu_exec_enter() and m68k_cpu_exec_exit(), Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 18/23] target-m68k: Remove incorrect clearing of cc_x, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 16/23] target-m68k: Print flags properly, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 17/23] target-m68k: Some fixes to SR and flags management, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 13/23] target-m68k: update move to/from ccr/sr, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 15/23] target-m68k: update CPU flags management, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 14/23] target-m68k: don't update cc_dest in helpers, Laurent Vivier, 2016/10/25
- [Qemu-devel] [PATCH 21/23] target-m68k: Use setcond for scc, Laurent Vivier, 2016/10/25