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[Qemu-devel] [PULL 12/21] apic: add send_msi() to APICCommonClass
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PULL 12/21] apic: add send_msi() to APICCommonClass |
Date: |
Mon, 17 Oct 2016 15:51:29 -0200 |
From: Radim Krčmář <address@hidden>
The MMIO based interface to APIC doesn't work well with MSIs that have
upper address bits set (remapped x2APIC MSIs). A specialized interface
is a quick and dirty way to avoid the shortcoming.
Reviewed-by: Igor Mammedov <address@hidden>
Reviewed-by: Peter Xu <address@hidden>
Signed-off-by: Radim Krčmář <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
---
hw/i386/kvm/apic.c | 19 +++++++++++++------
hw/i386/xen/xen_apic.c | 6 ++++++
hw/intc/apic.c | 8 ++++++--
include/hw/i386/apic_internal.h | 4 ++++
4 files changed, 29 insertions(+), 8 deletions(-)
diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c
index c016e63..be55102 100644
--- a/hw/i386/kvm/apic.c
+++ b/hw/i386/kvm/apic.c
@@ -169,6 +169,17 @@ static void kvm_apic_external_nmi(APICCommonState *s)
run_on_cpu(CPU(s->cpu), do_inject_external_nmi, s);
}
+static void kvm_send_msi(MSIMessage *msg)
+{
+ int ret;
+
+ ret = kvm_irqchip_send_msi(kvm_state, *msg);
+ if (ret < 0) {
+ fprintf(stderr, "KVM: injection failed, MSI lost (%s)\n",
+ strerror(-ret));
+ }
+}
+
static uint64_t kvm_apic_mem_read(void *opaque, hwaddr addr,
unsigned size)
{
@@ -179,13 +190,8 @@ static void kvm_apic_mem_write(void *opaque, hwaddr addr,
uint64_t data, unsigned size)
{
MSIMessage msg = { .address = addr, .data = data };
- int ret;
- ret = kvm_irqchip_send_msi(kvm_state, msg);
- if (ret < 0) {
- fprintf(stderr, "KVM: injection failed, MSI lost (%s)\n",
- strerror(-ret));
- }
+ kvm_send_msi(&msg);
}
static const MemoryRegionOps kvm_apic_io_ops = {
@@ -232,6 +238,7 @@ static void kvm_apic_class_init(ObjectClass *klass, void
*data)
k->enable_tpr_reporting = kvm_apic_enable_tpr_reporting;
k->vapic_base_update = kvm_apic_vapic_base_update;
k->external_nmi = kvm_apic_external_nmi;
+ k->send_msi = kvm_send_msi;
}
static const TypeInfo kvm_apic_info = {
diff --git a/hw/i386/xen/xen_apic.c b/hw/i386/xen/xen_apic.c
index 21d68ee..55769eb 100644
--- a/hw/i386/xen/xen_apic.c
+++ b/hw/i386/xen/xen_apic.c
@@ -68,6 +68,11 @@ static void xen_apic_external_nmi(APICCommonState *s)
{
}
+static void xen_send_msi(MSIMessage *msi)
+{
+ xen_hvm_inject_msi(msi->address, msi->data);
+}
+
static void xen_apic_class_init(ObjectClass *klass, void *data)
{
APICCommonClass *k = APIC_COMMON_CLASS(klass);
@@ -78,6 +83,7 @@ static void xen_apic_class_init(ObjectClass *klass, void
*data)
k->get_tpr = xen_apic_get_tpr;
k->vapic_base_update = xen_apic_vapic_base_update;
k->external_nmi = xen_apic_external_nmi;
+ k->send_msi = xen_send_msi;
}
static const TypeInfo xen_apic_info = {
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 7bd1d27..fe15fb6 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -740,8 +740,10 @@ static uint32_t apic_mem_readl(void *opaque, hwaddr addr)
return val;
}
-static void apic_send_msi(hwaddr addr, uint32_t data)
+static void apic_send_msi(MSIMessage *msi)
{
+ uint64_t addr = msi->address;
+ uint32_t data = msi->data;
uint8_t dest = (addr & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
uint8_t vector = (data & MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
uint8_t dest_mode = (addr >> MSI_ADDR_DEST_MODE_SHIFT) & 0x1;
@@ -762,7 +764,8 @@ static void apic_mem_writel(void *opaque, hwaddr addr,
uint32_t val)
* APIC is connected directly to the CPU.
* Mapping them on the global bus happens to work because
* MSI registers are reserved in APIC MMIO and vice versa. */
- apic_send_msi(addr, val);
+ MSIMessage msi = { .address = addr, .data = val };
+ apic_send_msi(&msi);
return;
}
@@ -913,6 +916,7 @@ static void apic_class_init(ObjectClass *klass, void *data)
k->external_nmi = apic_external_nmi;
k->pre_save = apic_pre_save;
k->post_load = apic_post_load;
+ k->send_msi = apic_send_msi;
}
static const TypeInfo apic_info = {
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 2866848..cdd11fb 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -146,6 +146,10 @@ typedef struct APICCommonClass
void (*pre_save)(APICCommonState *s);
void (*post_load)(APICCommonState *s);
void (*reset)(APICCommonState *s);
+ /* send_msi emulates an APIC bus and its proper place would be in a new
+ * device, but it's convenient to have it here for now.
+ */
+ void (*send_msi)(MSIMessage *msi);
} APICCommonClass;
struct APICCommonState {
--
2.7.4
- [Qemu-devel] [PULL 02/21] target-i386: List CPU models using subclass list, (continued)
- [Qemu-devel] [PULL 02/21] target-i386: List CPU models using subclass list, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 03/21] target-i386: Disable VME by default with TCG, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 04/21] target-i386: Register aliases for feature names with underscores, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 06/21] target-i386: Remove underscores from feat_names arrays, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 07/21] target-i386: Register properties for feature aliases manually, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 05/21] target-i386: Make plus_features/minus_features QOM-based, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 08/21] target-i386: xsave: Add FP and SSE bits to x86_ext_save_areas, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 09/21] qmp: Add runnability information to query-cpu-definitions, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 11/21] apic: add global apic_get_class(), Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 10/21] target-i386: Move warning code outside x86_cpu_filter_features(), Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 12/21] apic: add send_msi() to APICCommonClass,
Eduardo Habkost <=
- [Qemu-devel] [PULL 13/21] intel_iommu: pass whole remapped addresses to apic, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 14/21] intel_iommu: redo configuraton check in realize, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 15/21] intel_iommu: add OnOffAuto intr_eim as "eim" property, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 16/21] intel_iommu: reject broken EIM, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 18/21] target-i386: Unset cannot_destroy_with_object_finalize_yet, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 19/21] target-i386: x86_cpu_load_features() function, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 17/21] target-i386/kvm: cache the return value of kvm_enable_x2apic(), Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 21/21] target-i386: Don't use cpu->migratable when filtering features, Eduardo Habkost, 2016/10/17
- [Qemu-devel] [PULL 20/21] target-i386: Return runnability information on query-cpu-definitions, Eduardo Habkost, 2016/10/17
- Re: [Qemu-devel] [PULL 00/21] x86 queue, 2016-10-17, Peter Maydell, 2016/10/18