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Re: [Qemu-devel] [PATCH] hw/dma/pl080: Fix bad bit mask (PL080_CONF_M1 |
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH] hw/dma/pl080: Fix bad bit mask (PL080_CONF_M1 | PL080_CONF_M1) |
Date: |
Wed, 12 Oct 2016 13:21:18 +0100 |
On 12 October 2016 at 13:14, Thomas Huth <address@hidden> wrote:
> The M1 and M2 bits are both used for configuring the endianness
> of the AHB master interfaces, so the second PL080_CONF_M1 should
> be PL080_CONF_M2 instead.
>
> Buglink: https://bugs.launchpad.net/qemu/+bug/1631773
> Signed-off-by: Thomas Huth <address@hidden>
> ---
> hw/dma/pl080.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c
> index 3bed5c3..7724c93 100644
> --- a/hw/dma/pl080.c
> +++ b/hw/dma/pl080.c
> @@ -351,7 +351,7 @@ static void pl080_write(void *opaque, hwaddr offset,
> break;
> case 12: /* Configuration */
> s->conf = value;
> - if (s->conf & (PL080_CONF_M1 | PL080_CONF_M1)) {
> + if (s->conf & (PL080_CONF_M1 | PL080_CONF_M2)) {
> qemu_log_mask(LOG_UNIMP,
> "pl080_write: Big-endian DMA not implemented\n");
> }
> --
Applied to target-arm.next, thanks.
-- PMM