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Re: [Qemu-devel] [PATCH 07/29] target-sparc: implement UA2005 scratchpad
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 07/29] target-sparc: implement UA2005 scratchpad registers |
Date: |
Mon, 10 Oct 2016 16:37:31 -0500 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 |
On 10/01/2016 05:05 AM, Artyom Tarasenko wrote:
+ case ASI_SCRATCHPAD: /* UA2005 privileged scratchpad */
+ if (unlikely((addr >= 0x20) && (addr < 0x30))) {
+ /* Hyperprivileged access only */
+ cpu_unassigned_access(cs, addr, false, false, 1, size);
+ }
+ /* fall through */
+ case ASI_HYP_SCRATCHPAD: /* UA2005 hyperprivileged scratchpad */
+ {
+ unsigned int i = (addr >> 3) & 0x7;
+ ret = env->scratch[i];
+ break;
+ }
It *might* speed things up a teeny bit to implement ASI_HYP_SCRATCHPAD inline.
E.g.
case GET_ASI_HYP_SCRATCH:
{
TCGv_ptr tmp = tcg_temp_new_ptr();
#if UINTPTR_MAX == UINT32_MAX
tcg_gen_extrl_i64_i32(tmp, addr);
tcg_gen_andi_i32(tmp, tmp, 7 << 3);
#else
tcg_gen_andi_i64(tmp, addr, 7 << 3);
#endif
tcg_gen_add_ptr(tmp, tmp, cpu_env);
tcg_gen_ld_i64(dst, tmp, offsetof(CPUSPARCState, scratch));
tcg_temp_free_ptr(tmp);
}
break;
Of course, you can't do that for ASI_SCRATCHPAD because of the dynamic check
against ADDR.
@@ -2056,6 +2068,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
target_ulong val,
return;
case ASI_INTR_RECEIVE: /* Interrupt data receive */
env->ivec_status = val & 0x20;
+ if (!env->ivec_status) {
+ cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
+ }
return;
This belongs in some other patch.
r~
- Re: [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines, (continued)
[Qemu-devel] [PATCH 04/29] target-sparc: add UltraSPARC T1 TLB #defines, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 06/29] target-sparc: simplify replace_tlb_entry by using TTE_PGSIZE, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 05/29] target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor mode, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 08/29] target-sparc: implement UltraSPARC-T1 Strand status ASR, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 07/29] target-sparc: implement UA2005 scratchpad registers, Artyom Tarasenko, 2016/10/01
- Re: [Qemu-devel] [PATCH 07/29] target-sparc: implement UA2005 scratchpad registers,
Richard Henderson <=
[Qemu-devel] [PATCH 09/29] target-sparc: hypervisor mode takes over nucleus mode, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 11/29] target-sparc: implement UA2005 GL register, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 10/29] target-sparc: implement UA2005 hypervisor traps, Artyom Tarasenko, 2016/10/01
[Qemu-devel] [PATCH 12/29] target-sparc: implement UA2005 rdhpstate and wrhpstate instructions, Artyom Tarasenko, 2016/10/01