qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH v6 1/3] target-i386: Move warning code outside x


From: Igor Mammedov
Subject: Re: [Qemu-devel] [PATCH v6 1/3] target-i386: Move warning code outside x86_cpu_filter_features()
Date: Mon, 10 Oct 2016 13:57:08 +0200

On Fri,  7 Oct 2016 17:29:00 -0300
Eduardo Habkost <address@hidden> wrote:

> x86_cpu_filter_features() will be reused by code that shouldn't
> print any warning. Move the warning code to a new
> x86_cpu_report_filtered_features() function, and call it from
> x86_cpu_realizefn().
> 
> Signed-off-by: Eduardo Habkost <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>

> ---
> Changes v5 -> v6:
> * Recovered v3 of patch, because x86_cpu_load_features()
>   won't call x86_cpu_filter_features() anymore and we can keep
>   the previous logic in x86_cpu_realizefn() that checked
>   x86_cpu_filter_features() return value
> 
> Changes v4 -> v5:
> * (none)
> 
> Changes v3 -> v4:
> * Made x86_cpu_filter_features() void, make
>   x86_cpu_report_filtered_features() return true if
>   some features were filtered
> ---
>  target-i386/cpu.c | 28 +++++++++++++++++++---------
>  1 file changed, 19 insertions(+), 9 deletions(-)
> 
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 61240dd..1e8127b 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -2177,9 +2177,6 @@ static int x86_cpu_filter_features(X86CPU *cpu)
>          env->features[w] &= host_feat;
>          cpu->filtered_features[w] = requested_features & ~env->features[w];
>          if (cpu->filtered_features[w]) {
> -            if (cpu->check_cpuid || cpu->enforce_cpuid) {
> -                report_unavailable_features(w, cpu->filtered_features[w]);
> -            }
>              rv = 1;
>          }
>      }
> @@ -2187,6 +2184,15 @@ static int x86_cpu_filter_features(X86CPU *cpu)
>      return rv;
>  }
>  
> +static void x86_cpu_report_filtered_features(X86CPU *cpu)
> +{
> +    FeatureWord w;
> +
> +    for (w = 0; w < FEATURE_WORDS; w++) {
> +        report_unavailable_features(w, cpu->filtered_features[w]);
> +    }
> +}
> +
>  static void x86_cpu_apply_props(X86CPU *cpu, PropValue *props)
>  {
>      PropValue *pv;
> @@ -3080,12 +3086,16 @@ static void x86_cpu_realizefn(DeviceState *dev, Error 
> **errp)
>          env->cpuid_xlevel2 = env->cpuid_min_xlevel2;
>      }
>  
> -    if (x86_cpu_filter_features(cpu) && cpu->enforce_cpuid) {
> -        error_setg(&local_err,
> -                   kvm_enabled() ?
> -                       "Host doesn't support requested features" :
> -                       "TCG doesn't support requested features");
> -        goto out;
> +    if (x86_cpu_filter_features(cpu) &&
> +        (cpu->check_cpuid || cpu->enforce_cpuid)) {
> +        x86_cpu_report_filtered_features(cpu);
> +        if (cpu->enforce_cpuid) {
> +            error_setg(&local_err,
> +                       kvm_enabled() ?
> +                           "Host doesn't support requested features" :
> +                           "TCG doesn't support requested features");
> +            goto out;
> +        }
>      }
>  
>      /* On AMD CPUs, some CPUID[8000_0001].EDX bits must match the bits on




reply via email to

[Prev in Thread] Current Thread [Next in Thread]