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[Qemu-devel] [PATCH v4 07/11] target-i386: xsave: Add FP and SSE bits to
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PATCH v4 07/11] target-i386: xsave: Add FP and SSE bits to x86_ext_save_areas |
Date: |
Thu, 29 Sep 2016 18:14:55 -0300 |
Instead of treating the FP and SSE bits as special cases, add
them to the x86_ext_save_areas array. This will simplify the code
that calculates the supported xsave components and the size of
the xsave area.
Signed-off-by: Eduardo Habkost <address@hidden>
---
Changes series v3 -> v4:
* New patch added to series
---
target-i386/cpu.c | 22 ++++++++++++++++++----
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index c013ed0..b36388e 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -535,6 +535,20 @@ typedef struct ExtSaveArea {
} ExtSaveArea;
static const ExtSaveArea x86_ext_save_areas[] = {
+ [XSTATE_FP_BIT] = {
+ /* x87 FP state component is always enabled if XSAVE is supported */
+ .feature = FEAT_1_ECX, .bits = CPUID_EXT_XSAVE,
+ /* x87 state is in the legacy region of the XSAVE area */
+ .offset = 0,
+ .size = sizeof(X86LegacyXSaveArea) + sizeof(X86XSaveHeader),
+ },
+ [XSTATE_SSE_BIT] = {
+ /* SSE state component is always enabled if XSAVE is supported */
+ .feature = FEAT_1_ECX, .bits = CPUID_EXT_XSAVE,
+ /* SSE state is in the legacy region of the XSAVE area */
+ .offset = 0,
+ .size = sizeof(X86LegacyXSaveArea) + sizeof(X86XSaveHeader),
+ },
[XSTATE_YMM_BIT] =
{ .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX,
.offset = offsetof(X86XSaveArea, avx_state),
@@ -568,9 +582,9 @@ static const ExtSaveArea x86_ext_save_areas[] = {
static uint32_t xsave_area_size(uint64_t mask)
{
int i;
- uint64_t ret = sizeof(X86LegacyXSaveArea) + sizeof(X86XSaveHeader);
+ uint64_t ret = 0;
- for (i = 2; i < ARRAY_SIZE(x86_ext_save_areas); i++) {
+ for (i = 0; i < ARRAY_SIZE(x86_ext_save_areas); i++) {
const ExtSaveArea *esa = &x86_ext_save_areas[i];
if ((mask >> i) & 1) {
ret = MAX(ret, esa->offset + esa->size);
@@ -2963,8 +2977,8 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu)
return;
}
- mask = (XSTATE_FP_MASK | XSTATE_SSE_MASK);
- for (i = 2; i < ARRAY_SIZE(x86_ext_save_areas); i++) {
+ mask = 0;
+ for (i = 0; i < ARRAY_SIZE(x86_ext_save_areas); i++) {
const ExtSaveArea *esa = &x86_ext_save_areas[i];
if (env->features[esa->feature] & esa->bits) {
mask |= (1ULL << i);
--
2.7.4
- [Qemu-devel] [PATCH v4 00/11] Add runnability info to query-cpu-definitions, Eduardo Habkost, 2016/09/29
- [Qemu-devel] [PATCH v4 01/11] tests: Add test case for x86 feature parsing compatibility, Eduardo Habkost, 2016/09/29
- [Qemu-devel] [PATCH v4 03/11] target-i386: Disable VME by default with TCG, Eduardo Habkost, 2016/09/29
- [Qemu-devel] [PATCH v4 04/11] target-i386: Make plus_features/minus_features QOM-based, Eduardo Habkost, 2016/09/29
- [Qemu-devel] [PATCH v4 07/11] target-i386: xsave: Add FP and SSE bits to x86_ext_save_areas,
Eduardo Habkost <=
- [Qemu-devel] [PATCH v4 05/11] target-i386: Remove underscores from property names, Eduardo Habkost, 2016/09/29
- [Qemu-devel] [PATCH v4 02/11] target-i386: List CPU models using subclass list, Eduardo Habkost, 2016/09/29
- [Qemu-devel] [PATCH v4 08/11] target-i386: Move warning code outside x86_cpu_filter_features(), Eduardo Habkost, 2016/09/29
- [Qemu-devel] [PATCH v4 06/11] target-i386: Register properties for feature aliases manually, Eduardo Habkost, 2016/09/29
- [Qemu-devel] [PATCH v4 11/11] target-i386: Return runnability information on query-cpu-definitions, Eduardo Habkost, 2016/09/29
- [Qemu-devel] [PATCH v4 10/11] qmp: Add runnability information to query-cpu-definitions, Eduardo Habkost, 2016/09/29