Re: [Qemu-devel] [PATCH] m68k: change default system clock for m5208evb

[Greg Ungerer]

On 28/09/16 10:22, Peter Maydell wrote:
> On 27 September 2016 at 16:49, Greg Ungerer <address@hidden> wrote:
>> On 27/09/16 23:27, Laurent Vivier wrote:
>>> It is better because 166.67 MHZ is clearly a rounded value computed from
>>> the period: 1000000000/6000000 = 166.666666666666666666666666...
>>
>> Perhaps it is, but again it is not documented that way.
>> All the 5208 documentation talks in terms of frequency.
>> Would it not be clearer to define it in the same way that
>> the documentation lists?
>>
>> Prime example from the M5208 Reference Manual regarding
>> the PLL settings:
>>
>> . Voltage controlled oscillator range from 350 MHz to 540 MHz, resulting in 
>> a core frequency
>>   (fvco ÷ 3 (or fvco ÷ 4)) of 87.5 MHz to 166.67 MHz (maximum rated for 
>> device)
> 
> Documentation quite often describes things in ways which
> aren't what the underlying hardware actually does -- there's
> an art to reading it and figuring out what's really going
> on under the hood :-)

That can certainly be true.


> In the text you list here it says specifically that the
> 87.5 and 166.67 MHz frequencies are the results of
> dividing the fvco clock by 3 or 4, which is obviously
>  350 / 4 == 87.5 (for the low end)
>  500 / 3 == 166.666666... (for the high end)
> 
> (If you care you can probably work through what the PLL
> registers are set to that generates the 500MHz from
> the crystal frequency.)

It is reasonably strait forward, at least by what is documented
in the 5208 Reference Manual:

The output of the PLL is determined by:

  fsys = fref * (pfdr / (4 * cpudiv))

Where:

  fref is the external crystal (in this case 16MHz).
  pfdr is the PLL dividor register (set to 0x7d=125)
  cpudiv is from the PODR register (set to 3)

So that trivially gives fsys = 166666666

Anyway, perhaps the hardware designers set the maximum
operating frequency of the device based on cycle time
(ie 6ns) given internal path lengths, etc. Maybe there is
other reasons. Does it really matter? It is spelled out clearly
that the device limit is 166.67MHz, and that is by default
what the m5208evb is set to run at.

So what is an acceptable change to the frequency/cycle time
setting code in mcf5208.c for qemu? To just change the current
frequency definition, or change it to use period time and use
ptimer_set_period()?

Regards
Greg